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Searched refs:MSCH_BASE (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/dram/
A Ddram.c40 ch->ddrconfig = mmio_read_32(MSCH_BASE(i) + MSCH_DEVICECONF); in dram_init()
42 noc->ddrtiminga0.d32 = mmio_read_32(MSCH_BASE(i) + in dram_init()
44 noc->ddrtimingb0.d32 = mmio_read_32(MSCH_BASE(i) + in dram_init()
46 noc->ddrtimingc0.d32 = mmio_read_32(MSCH_BASE(i) + in dram_init()
48 noc->devtodev0.d32 = mmio_read_32(MSCH_BASE(i) + in dram_init()
50 noc->ddrmode.d32 = mmio_read_32(MSCH_BASE(i) + MSCH_DDRMODE); in dram_init()
51 noc->agingx0 = mmio_read_32(MSCH_BASE(i) + MSCH_AGINGX0); in dram_init()
A Dsuspend.c446 mmio_write_32(MSCH_BASE(channel) + MSCH_DEVICECONF, in set_ddrconfig()
448 mmio_write_32(MSCH_BASE(channel) + MSCH_DEVICESIZE, in set_ddrconfig()
464 mmio_write_32(MSCH_BASE(i) + MSCH_DDRTIMINGA0, in dram_all_config()
466 mmio_write_32(MSCH_BASE(i) + MSCH_DDRTIMINGB0, in dram_all_config()
468 mmio_write_32(MSCH_BASE(i) + MSCH_DDRTIMINGC0, in dram_all_config()
470 mmio_write_32(MSCH_BASE(i) + MSCH_DEVTODEV0, in dram_all_config()
472 mmio_write_32(MSCH_BASE(i) + MSCH_DDRMODE, noc->ddrmode.d32); in dram_all_config()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/include/shared/
A Daddressmap_shared.h102 #define MSCH_BASE(ch) (SERVICE_NOC_1_BASE + (ch) * 0x8000) macro

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