Searched refs:MVEBU_COMPHY_REG_BASE (Results 1 – 2 of 2) sorted by relevance
127 reg = mmio_read_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG); in mvebu_a3700_comphy_set_phy_selector()170 mmio_write_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG, reg); in mvebu_a3700_comphy_set_phy_selector()194 reg = mmio_read_32(MVEBU_COMPHY_REG_BASE + COMPHY_SELECTOR_PHY_REG); in mvebu_a3700_comphy_get_mode()407 offset = MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index); in mvebu_a3700_comphy_sgmii_power_on()535 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()543 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()556 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()566 reg_set(MVEBU_COMPHY_REG_BASE + COMPHY_PHY_CFG1_OFFSET(comphy_index), in mvebu_a3700_comphy_sgmii_power_on()569 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()579 ret = polling_with_timeout(MVEBU_COMPHY_REG_BASE + in mvebu_a3700_comphy_sgmii_power_on()[all …]
161 #define MVEBU_COMPHY_REG_BASE (MVEBU_REGS_BASE + 0x18300) macro
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