Searched refs:MVEBU_NB_GPIO_SEL_REG (Results 1 – 2 of 2) sorted by relevance
19 mmio_clrbits_32(MVEBU_NB_GPIO_SEL_REG, 1 << MVEBU_GPIO_TW1_GPIO_EN_OFF); in marvell_bl31_mpp_init()
107 #define MVEBU_NB_GPIO_SEL_REG (MVEBU_NB_GPIO_REG_BASE + 0x30) macro
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