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/arm-trusted-firmware-2.8.0/docs/design_documents/
A Dmeasured_boot_poc.rst301 NOTICE: BL1: Booting BL2
320 NOTICE: PCR_Event2:
330 NOTICE: PCR_Event2:
339 NOTICE: PCR_Event2:
348 NOTICE: PCR_Event2:
357 NOTICE: PCR_Event2:
366 NOTICE: PCR_Event2:
375 NOTICE: PCR_Event2:
384 NOTICE: PCR_Event2:
393 NOTICE: PCR_Event2:
[all …]
/arm-trusted-firmware-2.8.0/bl1/
A Dbl1_main.c85 NOTICE(FIRMWARE_WELCOME_STR); in bl1_main()
86 NOTICE("BL1: %s\n", version_string); in bl1_main()
87 NOTICE("BL1: %s\n", build_message); in bl1_main()
152 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); in bl1_main()
201 NOTICE("BL1: Booting BL2\n"); in bl1_load_bl2()
212 NOTICE("BL1: Booting BL31\n"); in bl1_print_next_bl_ep_info()
214 NOTICE("BL1: Booting BL32\n"); in bl1_print_next_bl_ep_info()
222 NOTICE("BL1: Debug loop, spinning forever\n"); in print_debug_loop_message()
223 NOTICE("BL1: Please connect the debugger to continue\n"); in print_debug_loop_message()
/arm-trusted-firmware-2.8.0/plat/arm/board/fvp_r/
A Dfvp_r_bl1_main.c91 NOTICE("BL1: Booting BL33\n"); in bl1_load_bl33()
184 NOTICE(FIRMWARE_WELCOME_STR); in bl1_main()
185 NOTICE("BL1: %s\n", version_string); in bl1_main()
186 NOTICE("BL1: %s\n", build_message); in bl1_main()
240 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); in bl1_main()
257 NOTICE("BL1: Booting BL31\n"); in bl1_print_next_bl_ep_info()
264 NOTICE("BL1: Debug loop, spinning forever\n"); in print_debug_loop_message()
265 NOTICE("BL1: Please connect the debugger to continue\n"); in print_debug_loop_message()
/arm-trusted-firmware-2.8.0/docs/plat/
A Drz-g2.rst177 NOTICE: BL2: PRR is RZ/G2M Ver.1.3
180 NOTICE: BL2: LCM state is unknown
181 NOTICE: BL2: DDR3200(rev.0.40)
182 NOTICE: BL2: [COLD_BOOT]
183 NOTICE: BL2: DRAM Split is 2ch
189 NOTICE: BL2: Lossy Decomp areas
193 NOTICE: BL2: FDT at 0xe631db30
196 NOTICE: BL2: Normal boot
203 NOTICE: rcar_file_len: len: 0x0003e000
208 NOTICE: rcar_file_len: len: 0x00100000
[all …]
A Drcar-gen3.rst207 NOTICE: BL2: PRR is R-Car H3 Ver.1.1
208 NOTICE: BL2: Board is Salvator-X Rev.1.0
210 NOTICE: BL2: LCM state is CM
212 NOTICE: BL2: DDR1600(rev.0.33)NOTICE: [COLD_BOOT]NOTICE: ..0
213 NOTICE: BL2: DRAM Split is 4ch
215 NOTICE: BL2: Lossy Decomp areas
221 NOTICE: BL2: Normal boot
229 NOTICE: rcar_file_len: len: 0x0003e000
234 NOTICE: rcar_file_len: len: 0x00100000
239 NOTICE: rcar_file_len: len: 0x00100000
[all …]
/arm-trusted-firmware-2.8.0/drivers/renesas/rcar/qos/H3/
A Dqos_init_h3_v10.c24 NOTICE("BL2: DRAM Split is 4ch\n"); in qos_init_h3_v10()
33 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_h3_v10()
42 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_h3_v10()
47 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v10()
99 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v10()
A Dqos_init_h3_v20.c114 NOTICE("BL2: DRAM Split is 4ch\n"); in qos_init_h3_v20()
123 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_h3_v20()
132 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_h3_v20()
137 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v20()
141 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v20()
143 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v20()
147 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3_v20()
230 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v20()
A Dqos_init_h3_v30.c121 NOTICE("BL2: DRAM Split is 4ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
131 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
142 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3_v30()
147 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3_v30()
151 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3_v30()
153 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3_v30()
157 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3_v30()
232 NOTICE("BL2: QoS is None\n"); in qos_init_h3_v30()
A Dqos_init_h3n_v30.c125 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3n_v30()
136 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_h3n_v30()
141 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_h3n_v30()
145 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_h3n_v30()
147 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_h3n_v30()
151 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_h3n_v30()
226 NOTICE("BL2: QoS is None\n"); in qos_init_h3n_v30()
/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dbl2_plat_setup.c163 NOTICE("BL2: Cannot create FCNL node (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
640 NOTICE("BL2: Detected invalid DRAM entries\n"); in bl2_advertise_dram_size()
755 NOTICE("BL2: PRR is RZ/%s Ver.1.%d\n", str, in bl2_el3_early_platform_setup()
770 NOTICE("BL2: %s\n", str); in bl2_el3_early_platform_setup()
790 NOTICE("BL2: Board is %s Rev.%d.%d\n", in bl2_el3_early_platform_setup()
828 NOTICE("BL2: Boot device is %s\n", str); in bl2_el3_early_platform_setup()
861 NOTICE("BL2: LCM state is %s\n", str); in bl2_el3_early_platform_setup()
901 NOTICE("BL2: Failed to eMMC mount operation.\n"); in bl2_el3_early_platform_setup()
942 NOTICE("BL2: Lossy Decomp areas\n"); in bl2_el3_early_platform_setup()
960 NOTICE("BL2: FDT at %p\n", fdt); in bl2_el3_early_platform_setup()
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/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/src/
A Dbl2_setup.c229 NOTICE("ihost_uvolts: %duv, vddc_uvolts: %duv\n", in set_ihost_vddc_swreg()
334 NOTICE("Switching on the Regulator idx: %u\n", in set_swreg_based_on_otp()
354 NOTICE("ddrc_uvolts: %duv\n", ddrc_uvolts); in set_swreg_based_on_otp()
593 NOTICE("pr0: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG0)); in dump_persistent_regs()
594 NOTICE("pr1: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG1)); in dump_persistent_regs()
595 NOTICE("pr2: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG2)); in dump_persistent_regs()
596 NOTICE("pr3: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG3)); in dump_persistent_regs()
597 NOTICE("pr4: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG4)); in dump_persistent_regs()
598 NOTICE("pr5: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG5)); in dump_persistent_regs()
599 NOTICE("pr6: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG6)); in dump_persistent_regs()
[all …]
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dbl2_plat_setup.c902 NOTICE("BL2: PRR is R-Car %s Ver.1.%d\n", in bl2_el3_early_platform_setup()
908 NOTICE("BL2: PRR is R-Car %s Ver.1.0\n", str); in bl2_el3_early_platform_setup()
910 NOTICE("BL2: PRR is R-Car %s Ver.1.1\n", str); in bl2_el3_early_platform_setup()
912 NOTICE("BL2: PRR is R-Car %s Ver.X.X\n", str); in bl2_el3_early_platform_setup()
925 NOTICE("BL2: %s\n", str); in bl2_el3_early_platform_setup()
949 NOTICE("BL2: Board is %s Rev.%d.%d\n", in bl2_el3_early_platform_setup()
991 NOTICE("BL2: Boot device is %s\n", str); in bl2_el3_early_platform_setup()
1022 NOTICE("BL2: LCM state is %s\n", str); in bl2_el3_early_platform_setup()
1103 NOTICE("BL2: Lossy Decomp areas\n"); in bl2_el3_early_platform_setup()
1121 NOTICE("BL2: FDT at %p\n", fdt); in bl2_el3_early_platform_setup()
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/arm-trusted-firmware-2.8.0/drivers/renesas/rcar/qos/E3/
A Dqos_init_e3_v10.c87 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_e3_v10()
92 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_e3_v10()
96 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_e3_v10()
98 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_e3_v10()
138 NOTICE("BL2: QoS is None\n"); in qos_init_e3_v10()
/arm-trusted-firmware-2.8.0/drivers/renesas/rzg/qos/G2E/
A Dqos_init_g2e_v10.c86 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2e_v10()
91 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2e_v10()
95 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2e_v10()
97 NOTICE("BL2: DRAM refresh interval 7.8 usec\n"); in qos_init_g2e_v10()
136 NOTICE("BL2: QoS is None\n"); in qos_init_g2e_v10()
/arm-trusted-firmware-2.8.0/plat/marvell/armada/common/mss/
A Dmss_scp_bootloader.c113 NOTICE("%s Loading MSS FW from addr. 0x%x Size 0x%x to MSS at 0x%lx\n", in mss_image_load()
154 NOTICE("CP MSS startup is postponed\n"); in mss_image_load()
165 NOTICE("Done\n"); in mss_image_load()
221 NOTICE("SCP Image doesn't contain PM firmware\n"); in mss_ap_load_image()
236 NOTICE("Load image to AP%d MSS\n", ap_idx); in load_img_to_cm3()
259 NOTICE("Skipping MSS CP%d related image\n", in load_img_to_cm3()
264 NOTICE("Load image to CP%d MSS AP%d\n", in load_img_to_cm3()
282 NOTICE("Skipping MG CP%d related image\n", in load_img_to_cm3()
286 NOTICE("Load image to CP%d MG\n", cp_index); in load_img_to_cm3()
330 NOTICE("SCP_BL2 contains %d concatenated images\n", in split_and_load_bl2_image()
/arm-trusted-firmware-2.8.0/drivers/nxp/flexspi/nor/
A Dtest_fspi.c33 NOTICE("-------------------------- %d----------------------------------\n", count++); in fspi_test()
50 NOTICE("[%d]: Success Erase: data in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); in fspi_test()
70 NOTICE("[%d]: Success IpWrite with IP READ in buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i-3]); in fspi_test()
86 …NOTICE("[%d]: Success IpWrite with AHB OR IP READ on buffer[%d] 0x%08x\n", __LINE__, i-3, buffer[i… in fspi_test()
/arm-trusted-firmware-2.8.0/drivers/renesas/rcar/qos/M3/
A Dqos_init_m3_v11.c120 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_m3_v11()
129 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3_v11()
134 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3_v11()
138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v11()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v11()
144 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3_v11()
219 NOTICE("BL2: QoS is None\n"); in qos_init_m3_v11()
A Dqos_init_m3_v30.c120 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_m3_v30()
129 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3_v30()
134 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3_v30()
138 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3_v30()
140 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3_v30()
144 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3_v30()
205 NOTICE("BL2: QoS is None\n"); in qos_init_m3_v30()
/arm-trusted-firmware-2.8.0/drivers/renesas/rzg/qos/G2H/
A Dqos_init_g2h_v30.c117 NOTICE("BL2: DRAM Split is 2ch(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_g2h_v30()
127 NOTICE("BL2: DRAM Split is OFF(DDR %x)\n", (int)qos_init_ddr_phyvalid); in qos_init_g2h_v30()
132 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2h_v30()
136 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2h_v30()
138 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2h_v30()
142 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2h_v30()
213 NOTICE("BL2: QoS is None\n"); in qos_init_g2h_v30()
/arm-trusted-firmware-2.8.0/drivers/renesas/rzg/qos/G2M/
A Dqos_init_g2m_v11.c118 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_g2m_v11()
126 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2m_v11()
131 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2m_v11()
135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v11()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v11()
141 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2m_v11()
214 NOTICE("BL2: QoS is None\n"); in qos_init_g2m_v11()
A Dqos_init_g2m_v30.c118 NOTICE("BL2: DRAM Split is 2ch\n"); in qos_init_g2m_v30()
126 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2m_v30()
131 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2m_v30()
135 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2m_v30()
137 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2m_v30()
141 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2m_v30()
206 NOTICE("BL2: QoS is None\n"); in qos_init_g2m_v30()
/arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/common/
A Dplat_ble_setup.c322 NOTICE("== SVC test build ==\n"); in avs_update_from_eeprom()
323 NOTICE("EEPROM holds values 0x%x, 0x%x and 0x%x\n", in avs_update_from_eeprom()
339 NOTICE("Ignore BAD AVS Override value in EEPROM!\n"); in avs_update_from_eeprom()
341 NOTICE("Override AVS by EEPROM value 0x%x\n", new_wp); in avs_update_from_eeprom()
391 NOTICE("SVC_TEST: AVS bypassed\n"); in ble_plat_svc_config()
450 NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n", in ble_plat_svc_config()
481 NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n", in ble_plat_svc_config()
535 NOTICE("7040 1600Mhz, avs = 0x%x\n", in ble_plat_svc_config()
538 NOTICE("SVC: AVS work point not changed\n"); in ble_plat_svc_config()
545 NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n", in ble_plat_svc_config()
[all …]
/arm-trusted-firmware-2.8.0/drivers/renesas/rcar/qos/M3N/
A Dqos_init_m3n_v10.c119 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_m3n_v10()
124 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_m3n_v10()
128 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_m3n_v10()
130 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_m3n_v10()
134 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_m3n_v10()
199 NOTICE("BL2: QoS is None\n"); in qos_init_m3n_v10()
/arm-trusted-firmware-2.8.0/drivers/renesas/rzg/qos/G2N/
A Dqos_init_g2n_v10.c118 NOTICE("BL2: DRAM Split is OFF\n"); in qos_init_g2n_v10()
123 NOTICE("BL2: QoS is default setting(%s)\n", RCAR_QOS_VERSION); in qos_init_g2n_v10()
127 NOTICE("BL2: DRAM refresh interval 1.95 usec\n"); in qos_init_g2n_v10()
129 NOTICE("BL2: DRAM refresh interval 3.9 usec\n"); in qos_init_g2n_v10()
133 NOTICE("BL2: Periodic Write DQ Training\n"); in qos_init_g2n_v10()
192 NOTICE("BL2: QoS is None\n"); in qos_init_g2n_v10()
/arm-trusted-firmware-2.8.0/bl2u/
A Dbl2u_main.c30 NOTICE("BL2U: %s\n", version_string); in bl2u_main()
31 NOTICE("BL2U: %s\n", build_message); in bl2u_main()

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