Searched refs:PFC_DRVCTRL21 (Results 1 – 8 of 8) sorted by relevance
202 #define PFC_DRVCTRL21 (PFC_BASE + 0x0354U) macro
1085 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_h3_v1()1094 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_h3_v1()
1118 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_h3_v2()1127 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_h3_v2()
1120 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_m3n()1129 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_m3n()
1206 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_g2h()1216 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_g2h()
1202 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_g2n()1212 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_g2n()
1213 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_m3()1222 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_m3()
1202 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_g2m()1211 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_g2m()
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