| /arm-trusted-firmware-2.8.0/plat/arm/board/rdv1mc/ |
| A D | rdv1mc_plat.c | 32 .rt_owner_base = PLAT_ARM_GICD_BASE,
36 PLAT_ARM_GICD_BASE >> 16,
37 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16,
39 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2)) >> 16,
42 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3)) >> 16,
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn2/ |
| A D | rdn2_plat.c | 34 .rt_owner_base = PLAT_ARM_GICD_BASE,
38 PLAT_ARM_GICD_BASE >> 16,
40 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16,
43 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(2)) >> 16,
46 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(3)) >> 16,
|
| /arm-trusted-firmware-2.8.0/services/spd/trusty/ |
| A D | generic-arm64-smcall.c | 15 #ifndef PLAT_ARM_GICD_BASE
17 #define PLAT_ARM_GICD_BASE GICD_BASE macro
23 #error PLAT_ARM_GICD_BASE or GICD_BASE must be defined
68 return PLAT_ARM_GICD_BASE; in trusty_get_reg_base()
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn1edge/ |
| A D | rdn1edge_plat.c | 22 .rt_owner_base = PLAT_ARM_GICD_BASE,
26 PLAT_ARM_GICD_BASE >> 16,
27 (PLAT_ARM_GICD_BASE + CSS_SGI_REMOTE_CHIP_MEM_OFFSET(1)) >> 16
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/ |
| A D | n1sdp_bl31_setup.c | 46 .rt_owner_base = PLAT_ARM_GICD_BASE,
50 PLAT_ARM_GICD_BASE >> 16,
51 PLAT_ARM_GICD_BASE >> 16
|
| /arm-trusted-firmware-2.8.0/include/plat/arm/css/common/aarch64/ |
| A D | css_macros.S | 20 mov_imm x16, PLAT_ARM_GICD_BASE
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rde1edge/include/ |
| A D | platform_def.h | 44 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/sgi575/include/ |
| A D | platform_def.h | 45 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn1edge/include/ |
| A D | platform_def.h | 50 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/include/ |
| A D | platform_def.h | 48 #define PLAT_ARM_GICD_BASE 0xF6801000 macro
|
| A D | plat_macros.S | 36 mov_imm x16, PLAT_ARM_GICD_BASE
|
| /arm-trusted-firmware-2.8.0/plat/arm/common/ |
| A D | arm_gicv2.c | 35 .gicd_base = PLAT_ARM_GICD_BASE,
|
| A D | arm_gicv3.c | 79 .gicd_base = PLAT_ARM_GICD_BASE,
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdv1/include/ |
| A D | platform_def.h | 64 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdv1mc/include/ |
| A D | platform_def.h | 59 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn2/include/ |
| A D | platform_def.h | 87 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/include/ |
| A D | platform_def.h | 118 #define PLAT_ARM_GICD_BASE BASE_GICD_BASE macro
|
| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_bl31_setup.c | 49 .gicd_base = PLAT_ARM_GICD_BASE,
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/fvp/ |
| A D | fvp_gicv3.c | 124 fvp_gic_data.gicd_base = PLAT_ARM_GICD_BASE; in plat_arm_gic_driver_init()
|
| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/include/ |
| A D | platform_def.h | 110 #define PLAT_ARM_GICD_BASE BASE_GICD_BASE macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/morello/include/ |
| A D | platform_def.h | 187 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/include/ |
| A D | platform_def.h | 237 #define PLAT_ARM_GICD_BASE 0x30000000 macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/tc/include/ |
| A D | platform_def.h | 247 #define PLAT_ARM_GICD_BASE UL(0x30000000) macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/fvp_r/include/ |
| A D | platform_def.h | 250 #define PLAT_ARM_GICD_BASE BASE_GICD_BASE macro
|
| /arm-trusted-firmware-2.8.0/plat/arm/board/juno/include/ |
| A D | platform_def.h | 229 #define PLAT_ARM_GICD_BASE UL(0x2c010000) macro
|