Searched refs:PLAT_BRCM_MHU_BASE (Results 1 – 2 of 2) sorted by relevance
48 if (!(mmio_read_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_start()64 assert(!(mmio_read_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT) & in mhu_secure_message_send()68 mmio_setbits_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_SET, 1 << slot_id); in mhu_secure_message_send()70 mmio_write_32(PLAT_BRCM_MHU_BASE + PLAT_MHU_INTR_REG, 0x1); in mhu_secure_message_send()92 response = mmio_read_32(PLAT_BRCM_MHU_BASE + SCP_INTR_S_STAT); in mhu_secure_message_wait()111 mmio_clrbits_32(PLAT_BRCM_MHU_BASE + SCP_INTR_S_CLEAR, 1 << slot_id); in mhu_secure_message_end()124 mmio_write_32(PLAT_BRCM_MHU_BASE + CPU_INTR_S_STAT, 0); in mhu_secure_init()125 mmio_write_32(PLAT_BRCM_MHU_BASE + SCP_INTR_S_STAT, 0); in mhu_secure_init()
164 #define PLAT_BRCM_MHU_BASE 0x0 macro
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