Home
last modified time | relevance | path

Searched refs:PLAT_MAX_OFF_STATE (Results 1 – 25 of 99) sorted by relevance

1234

/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/
A Dhikey_pm.c64 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in hikey_pwr_domain_on_finish()
88 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey_pwr_domain_off()
104 if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in hikey_pwr_domain_suspend()
107 if (CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey_pwr_domain_suspend()
114 if (SYSTEM_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in hikey_pwr_domain_suspend()
119 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey_pwr_domain_suspend()
139 if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in hikey_pwr_domain_suspend_finish()
148 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in hikey_pwr_domain_suspend_finish()
153 if (SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey_pwr_domain_suspend_finish()
168 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey_get_sys_suspend_power_state()
[all …]
/arm-trusted-firmware-2.8.0/plat/rockchip/common/
A Dplat_pm.c158 PLAT_MAX_OFF_STATE; in rockchip_validate_power_state()
177 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rockchip_get_sys_suspend_power_state()
222 assert(RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE); in rockchip_pwr_domain_off()
226 if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_off()
249 if (RK_CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_suspend()
255 if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_suspend()
261 if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_suspend()
264 if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_suspend()
286 assert(RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE); in rockchip_pwr_domain_on_finish()
324 if (RK_CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in rockchip_pwr_domain_suspend_finish()
[all …]
/arm-trusted-firmware-2.8.0/plat/nxp/common/psci/
A Dplat_psci.c175 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend()
195 PLAT_MAX_OFF_STATE) { in _pwr_suspend()
248 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()
272 PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()
349 PLAT_MAX_OFF_STATE; in _pwr_state_validate()
357 PLAT_MAX_OFF_STATE; in _pwr_state_validate()
365 PLAT_MAX_OFF_STATE; in _pwr_state_validate()
375 PLAT_MAX_OFF_STATE; in _pwr_state_validate()
395 req_state->pwr_domain_state[PLAT_MAX_LVL] = PLAT_MAX_OFF_STATE; in _pwr_state_sys_suspend()
396 req_state->pwr_domain_state[PLAT_SYS_LVL] = PLAT_MAX_OFF_STATE; in _pwr_state_sys_suspend()
[all …]
/arm-trusted-firmware-2.8.0/plat/imx/common/
A Dimx8_psci.c43 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in imx_validate_power_state()
47 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_OFF_STATE; in imx_validate_power_state()
59 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in imx_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Dplat_pm.c80 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rcar_pwr_domain_on_finish()
103 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in rcar_pwr_domain_off()
117 if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in rcar_pwr_domain_suspend()
125 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in rcar_pwr_domain_suspend()
138 if (SYSTEM_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in rcar_pwr_domain_suspend_finish()
161 if (SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in rcar_pwr_domain_pwr_down_wfi()
265 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_validate_power_state()
284 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/
A Dhikey960_pm.c85 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) in hikey960_pwr_domain_on_finish()
164 PLAT_MAX_OFF_STATE; in hikey960_validate_power_state()
195 if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in hikey960_pwr_domain_suspend()
198 if (CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey960_pwr_domain_suspend()
216 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in hikey960_pwr_domain_suspend()
272 if (CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in hikey960_pwr_domain_suspend_finish()
294 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey960_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/
A Dplat_pm.c77 PLAT_MAX_OFF_STATE); in poplar_pwr_domain_on_finish()
122 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in poplar_validate_power_state()
148 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in poplar_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1028a/include/
A Dsoc.h132 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1) macro
133 #define LS_LOCAL_STATE_OFF PLAT_MAX_OFF_STATE
/arm-trusted-firmware-2.8.0/plat/ti/k3/common/
A Dk3_psci.c91 assert(CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE); in k3_pwr_domain_off()
107 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) { in k3_pwr_domain_off()
137 if (CLUSTER_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE) in k3_pwr_domain_off()
266 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in k3_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/mediatek/include/armv8_2/
A Darch_def.h13 #define PLAT_MAX_OFF_STATE (2) macro
/arm-trusted-firmware-2.8.0/plat/xilinx/versal/
A Dplat_psci.c204 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal_validate_power_state()
222 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state()
223 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/
A Dplat_psci.c187 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in zynqmp_validate_power_state()
199 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state()
200 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/
A Dplat_psci_pm.c206 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal_net_validate_power_state()
224 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in versal_net_get_sys_suspend_power_state()
225 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in versal_net_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/generic/include/
A Dboard_def.h36 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/j784s4/include/
A Dboard_def.h35 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/lite/include/
A Dboard_def.h38 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/include/
A Dsoc.h214 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1) macro
215 #define LS_LOCAL_STATE_OFF PLAT_MAX_OFF_STATE
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1043a/include/
A Dsoc.h210 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1) macro
211 #define LS_LOCAL_STATE_OFF PLAT_MAX_OFF_STATE
/arm-trusted-firmware-2.8.0/plat/qti/msm8916/include/
A Dplatform_def.h38 #define PLAT_MAX_OFF_STATE U(3) macro
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/include/
A Dplatform_def.h40 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/amlogic/gxl/include/
A Dplatform_def.h32 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/amlogic/g12a/include/
A Dplatform_def.h32 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/amlogic/gxbb/include/
A Dplatform_def.h35 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/amlogic/axg/include/
A Dplatform_def.h32 #define PLAT_MAX_OFF_STATE U(2) macro
/arm-trusted-firmware-2.8.0/plat/imx/imx8qx/include/
A Dplatform_def.h27 #define PLAT_MAX_OFF_STATE U(2) macro

Completed in 55 milliseconds

1234