/arm-trusted-firmware-2.8.0/plat/nxp/common/psci/ |
A D | plat_psci.c | 151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby() 184 == PLAT_MAX_RET_STATE) { in _pwr_suspend() 206 PLAT_MAX_RET_STATE) { in _pwr_suspend() 227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend() 259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish() 285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish() 309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish() 352 PLAT_MAX_RET_STATE; in _pwr_state_validate() 360 PLAT_MAX_RET_STATE; in _pwr_state_validate() 368 PLAT_MAX_RET_STATE; in _pwr_state_validate() [all …]
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/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mq/ |
A D | imx8mq_psci.c | 30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
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/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1028a/include/ |
A D | soc.h | 128 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1) macro 129 #define LS_LOCAL_STATE_RET PLAT_MAX_RET_STATE 132 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1)
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/arm-trusted-firmware-2.8.0/plat/xilinx/versal/ |
A D | plat_psci.c | 64 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend() 68 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend() 76 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend() 106 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish() 202 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
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/arm-trusted-firmware-2.8.0/plat/imx/common/ |
A D | imx8_psci.c | 45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state() 60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
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/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/include/ |
A D | soc.h | 98 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1) macro 101 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1)
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/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/include/ |
A D | soc.h | 210 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1) macro 211 #define LS_LOCAL_STATE_RET PLAT_MAX_RET_STATE 214 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1)
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/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1043a/include/ |
A D | soc.h | 206 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1) macro 207 #define LS_LOCAL_STATE_RET PLAT_MAX_RET_STATE 210 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1)
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/arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/ |
A D | plat_psci.c | 95 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend() 102 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend() 134 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish() 185 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
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/arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/ |
A D | plat_psci_pm.c | 116 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_net_pwr_domain_suspend() 120 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_net_pwr_domain_suspend() 162 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_net_pwr_domain_suspend_finish() 204 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_net_validate_power_state()
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/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/include/ |
A D | soc.h | 106 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1) macro 109 #define PLAT_MAX_OFF_STATE (PLAT_MAX_RET_STATE + 1)
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/arm-trusted-firmware-2.8.0/plat/mediatek/include/armv8_2/ |
A D | arch_def.h | 12 #define PLAT_MAX_RET_STATE (1) macro
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/arm-trusted-firmware-2.8.0/plat/ti/k3/board/generic/include/ |
A D | board_def.h | 37 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/ti/k3/board/j784s4/include/ |
A D | board_def.h | 36 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/ti/k3/board/lite/include/ |
A D | board_def.h | 39 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/include/ |
A D | plat_pm.h | 116 #define PLAT_MT_CPU_SUSPEND_CLUSTER PLAT_MAX_RET_STATE 119 #define IS_PLAT_SYSTEM_RETENTION(aff) (aff >= PLAT_MAX_RET_STATE)
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/arm-trusted-firmware-2.8.0/plat/qti/msm8916/include/ |
A D | platform_def.h | 37 #define PLAT_MAX_RET_STATE U(2) macro
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/arm-trusted-firmware-2.8.0/plat/mediatek/lib/pm/ |
A D | mtk_pm.h | 208 #define PLAT_MT_CPU_SUSPEND_CLUSTER PLAT_MAX_RET_STATE 209 #define PLAT_MT_CPU_SUSPEND_MCUSYS PLAT_MAX_RET_STATE 212 #define IS_PLAT_SYSTEM_RETENTION(aff) (aff >= PLAT_MAX_RET_STATE)
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/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mq/include/ |
A D | platform_def.h | 27 #define PLAT_MAX_RET_STATE U(1) macro 29 #define PLAT_WAIT_RET_STATE PLAT_MAX_RET_STATE
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/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/include/ |
A D | platform_def.h | 39 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/amlogic/gxl/include/ |
A D | platform_def.h | 31 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/amlogic/g12a/include/ |
A D | platform_def.h | 31 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/amlogic/gxbb/include/ |
A D | platform_def.h | 34 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/amlogic/axg/include/ |
A D | platform_def.h | 31 #define PLAT_MAX_RET_STATE U(1) macro
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/arm-trusted-firmware-2.8.0/plat/imx/imx8qx/include/ |
A D | platform_def.h | 28 #define PLAT_MAX_RET_STATE U(1) macro
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