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Searched refs:PLL_MODE_SHIFT (Results 1 – 6 of 6) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/pmu/
A Dplat_pmu_macros.S30 #define PLL_MODE_SHIFT (0x8) macro
31 #define PLL_NORMAL_MODE ((0x3 << (PLL_MODE_SHIFT + 16)) | \
32 (0x1 << PLL_MODE_SHIFT))
A Dpmu.c620 PLL_MODE_SHIFT; in clst_pwr_domain_resume()
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/soc/
A Dsoc.h96 #define PLL_MODE_SHIFT(id) ((id) == CPLL_ID ? \ macro
99 #define PLL_MODE_MSK(id) (0x3 << PLL_MODE_SHIFT(id))
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/soc/
A Dsoc.h18 #define PLL_MODE_SHIFT 0x08 macro
36 PLL_MODE_MSK, PLL_MODE_SHIFT)
39 PLL_MODE_MSK, PLL_MODE_SHIFT)
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3368/drivers/soc/
A Dsoc.h109 #define PLL_MODE_SHIFT 8 macro
111 #define PLLS_MODE_WMASK (PLL_MODE_MSK << (16 + PLL_MODE_SHIFT))
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/
A Dpmu.c884 uint32_t val = BITS_WITH_WMASK(mode, 0x3, PLL_MODE_SHIFT(pll_id)); in pll_set_mode()
918 mode = (ddr_data.cru_mode_save >> PLL_MODE_SHIFT(pll_id)) & 0x3; in pll_resume()

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