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Searched refs:PMUGRF_FAILSAFE_SHTDN_WDT (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/soc/
A Dsoc.c96 tmp &= ~(PMUGRF_FAILSAFE_SHTDN_TSADC | PMUGRF_FAILSAFE_SHTDN_WDT); in soc_reset_config_all()
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/
A Dpmu.h267 #define PMUGRF_FAILSAFE_SHTDN_WDT BIT(1) macro

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