Searched refs:PMU_CPUAPM_CON (Results 1 – 4 of 4) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3328/drivers/pmu/ |
| A D | pmu.c | 41 apm_reg = mmio_read_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id)) & in get_cpus_pwr_domain_cfg_info()
63 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
68 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
79 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
98 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
106 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
179 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE); in rockchip_soc_cores_pwr_dm_on_finish()
188 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), CORES_PM_DISABLE); in rockchip_soc_cores_pwr_dm_resume()
581 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(PD_CPU0), apm_value); in sram_soc_enter_lp()
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| A D | pmu.h | 66 #define PMU_CPUAPM_CON(n) (0x80 + (n) * 4) macro
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| /arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/ |
| A D | pmu.c | 396 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
399 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
419 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
438 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
447 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_off()
487 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in rockchip_soc_cores_pwr_dm_on_finish()
521 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in rockchip_soc_cores_pwr_dm_resume()
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| A D | pmu.h | 65 #define PMU_CPUAPM_CON(cpu) (0xe0 + (cpu) * 0x4) macro
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