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Searched refs:PMU_SFT_CON (Results 1 – 11 of 11) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/m0/src/
A Dsuspend.c46 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, 0x02); in m0_main()
55 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, 0x02); in m0_main()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/pmu/
A Dplat_pmu_macros.S90 ldr w0, [x5, #PMU_SFT_CON]
93 str w0, [x5, #PMU_SFT_CON]
117 ldr w0, [x5, #PMU_SFT_CON]
120 str w0, [x5, #PMU_SFT_CON]
A Dpmu.c426 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(L2_FLUSH_REQ_CLUSTER_B)); in rk3399_flush_l2_b()
441 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, BIT(L2_FLUSH_REQ_CLUSTER_B)); in rk3399_flush_l2_b()
457 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(ACINACTM_CLUSTER_B_CFG)); in pmu_scu_b_pwrdn()
471 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, BIT(ACINACTM_CLUSTER_B_CFG)); in pmu_scu_b_pwrup()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3368/drivers/pmu/
A Dpmu.c33 regs_updata_bit_set(PMU_BASE + PMU_SFT_CON, pmu_sft_l2flsh_clst_b); in rk3368_flash_l2_b()
44 regs_updata_bit_clr(PMU_BASE + PMU_SFT_CON, pmu_sft_l2flsh_clst_b); in rk3368_flash_l2_b()
168 regs_updata_bit_clr(PMU_BASE + PMU_SFT_CON, pmu_sft_acinactm_clst_b); in pmu_scu_b_pwrup()
184 regs_updata_bit_set(PMU_BASE + PMU_SFT_CON, pmu_sft_acinactm_clst_b); in pmu_scu_b_pwrdn()
230 regs_updata_bit_set(PMU_BASE + PMU_SFT_CON, pmu_sft_glbl_int_dis_b); in pmu_set_sleep_mode()
A Dpmu.h27 #define PMU_SFT_CON 0x1c macro
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3288/drivers/pmu/
A Dpmu.h32 #define PMU_SFT_CON 0x48 macro
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3328/drivers/pmu/
A Dpmu.h62 #define PMU_SFT_CON 0x1c macro
A Dpmu.c509 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(0)); in ddr_suspend()
514 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, BIT(2)); in ddr_suspend()
544 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, BIT(2)); in dmc_restore()
546 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, BIT(0)); in dmc_restore()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/include/shared/
A Dpmu_regs.h19 #define PMU_SFT_CON 0x24 macro
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/
A Dpmu.h30 #define PMU_SFT_CON 0x34 macro
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/dram/
A Ddfs.c1756 low_power |= ((mmio_read_32(PMU_BASE + PMU_SFT_CON) >> tmp) & in exit_low_power()
1758 mmio_clrbits_32(PMU_BASE + PMU_SFT_CON, 1 << tmp); in exit_low_power()
1792 mmio_setbits_32(PMU_BASE + PMU_SFT_CON, val << tmp); in resume_low_power()

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