Home
last modified time | relevance | path

Searched refs:PSCI_LOCAL_STATE_RUN (Results 1 – 17 of 17) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1028a/include/
A Dsoc.h125 #define LS_LOCAL_STATE_RUN PSCI_LOCAL_STATE_RUN
128 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1)
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/include/
A Dsoc.h207 #define LS_LOCAL_STATE_RUN PSCI_LOCAL_STATE_RUN
210 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1)
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1043a/include/
A Dsoc.h203 #define LS_LOCAL_STATE_RUN PSCI_LOCAL_STATE_RUN
206 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1)
/arm-trusted-firmware-2.8.0/include/lib/psci/
A Dpsci.h229 #define PSCI_LOCAL_STATE_RUN U(0) macro
236 return (plat_local_state == PSCI_LOCAL_STATE_RUN) ? 1 : 0; in is_local_state_run()
244 return ((plat_local_state > PSCI_LOCAL_STATE_RUN) && in is_local_state_retn()
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/include/
A Dsoc.h98 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1)
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t186/
A Dplat_psci_handlers.c219 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
238 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
246 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
261 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/include/
A Dsoc.h106 #define PLAT_MAX_RET_STATE (PSCI_LOCAL_STATE_RUN + 1)
/arm-trusted-firmware-2.8.0/lib/psci/
A Dpsci_common.c323 target_state->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_get_target_local_pwr_states()
387 PSCI_LOCAL_STATE_RUN); in psci_set_pwr_domains_to_run()
390 PSCI_LOCAL_STATE_RUN); in psci_set_pwr_domains_to_run()
397 psci_set_cpu_local_state(PSCI_LOCAL_STATE_RUN); in psci_set_pwr_domains_to_run()
471 state_info->pwr_domain_state[lvl] = PSCI_LOCAL_STATE_RUN; in psci_do_state_coordination()
775 psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} }; in psci_warmboot_entrypoint()
A Dpsci_main.c61 psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} }; in psci_cpu_suspend()
111 psci_set_cpu_local_state(PSCI_LOCAL_STATE_RUN); in psci_cpu_suspend()
A Dpsci_stat.c181 psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} }; in psci_get_stat()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t194/
A Dplat_psci_handlers.c83 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PSCI_LOCAL_STATE_RUN; in tegra_soc_validate_power_state()
231 target = PSCI_LOCAL_STATE_RUN; in tegra_get_afflvl1_pwr_state()
246 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c105 plat_local_state_t target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
131 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
171 target = PSCI_LOCAL_STATE_RUN; in tegra_soc_get_target_pwr_state()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/common/
A Dtegra_pm.c290 psci_power_state_t target_state = { { PSCI_LOCAL_STATE_RUN } }; in plat_setup_psci_ops()
/arm-trusted-firmware-2.8.0/plat/allwinner/common/
A Dsunxi_scpi_pm.c156 req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN; in sunxi_validate_power_state()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/
A Dimx8m_psci_common.c142 imx_set_cluster_powerdown(core_id, PSCI_LOCAL_STATE_RUN); in imx_domain_suspend_finish()
/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Dplat_pm.c289 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PSCI_LOCAL_STATE_RUN; in rcar_get_sys_suspend_power_state()
/arm-trusted-firmware-2.8.0/plat/mediatek/lib/pm/armv8_2/
A Dpwr_ctrl.c401 req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN; in armv8_2_get_sys_suspend_power_state()

Completed in 37 milliseconds