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Searched refs:QSPI_WP_N_MODE_SEL_CONTROL (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/include/
A Dsr_utils.h19 mmio_write_32(QSPI_WP_N_MODE_SEL_CONTROL, enable_ap); in brcm_stingray_set_qspi_mux()
A Dsr_def.h595 #define QSPI_WP_N_MODE_SEL_CONTROL (HSLS_MODE_SEL_CONTROL + 0x3ec) macro

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