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Searched refs:RCAR_CNTC_BASE (Results 1 – 5 of 5) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Dbl31_plat_setup.c112 mmio_write_32(RCAR_CNTC_BASE + CNTCR_OFF, CNTCR_FCREQ(U(0)) | CNTCR_EN); in bl31_platform_setup()
/arm-trusted-firmware-2.8.0/drivers/renesas/common/pwrc/
A Dpwrc.c392 mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF)); in rcar_pwrc_save_timer_state()
399 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF), 0U); in rcar_pwrc_restore_timer_state()
401 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF), in rcar_pwrc_restore_timer_state()
403 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF), in rcar_pwrc_restore_timer_state()
406 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF), in rcar_pwrc_restore_timer_state()
412 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF), in rcar_pwrc_restore_timer_state()
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/
A Drcar_def.h121 #define RCAR_CNTC_BASE U(0xE6080000) macro
206 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE
/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dbl2_plat_setup.c1018 mmio_setbits_32(RCAR_CNTC_BASE + (uintptr_t)CNTCR_OFF, in bl2_init_generic_timer()
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dbl2_plat_setup.c1197 mmio_setbits_32(RCAR_CNTC_BASE + (uintptr_t)CNTCR_OFF, in bl2_init_generic_timer()

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