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Searched refs:RST_WDTRSTCR (Results 1 – 4 of 4) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/renesas/common/watchdog/
A Dswdt.c17 #define RST_WDTRSTCR (RST_BASE + 0x0054U) macro
66 rmsk = mmio_read_32(RST_WDTRSTCR) & WDTRSTCR_MASK_ALL; in swdt_disable()
68 mmio_write_32(RST_WDTRSTCR, WDTRSTCR_UPPER_BYTE | rmsk); in swdt_disable()
124 rmsk = mmio_read_32(RST_WDTRSTCR) & WDTRSTCR_MASK_ALL; in rcar_swdt_init()
126 mmio_write_32(RST_WDTRSTCR, rmsk); in rcar_swdt_init()
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/
A Drcar_def.h234 #define RST_WDTRSTCR (RST_BASE + 0x0054U) macro
/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dbl2_plat_setup.c909 reg = mmio_read_32(RST_WDTRSTCR); in bl2_el3_early_platform_setup()
912 mmio_write_32(RST_WDTRSTCR, reg); in bl2_el3_early_platform_setup()
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dbl2_plat_setup.c1072 reg = mmio_read_32(RST_WDTRSTCR); in bl2_el3_early_platform_setup()
1075 mmio_write_32(RST_WDTRSTCR, reg); in bl2_el3_early_platform_setup()

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