Home
last modified time | relevance | path

Searched refs:SAR_PCIE0_CLK_CFG_OFFSET (Results 1 – 1 of 1) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/marvell/mochi/
A Dcp110_setup.c66 #define SAR_PCIE0_CLK_CFG_OFFSET 30 macro
67 #define SAR_PCIE0_CLK_CFG_MASK (0x1 << SAR_PCIE0_CLK_CFG_OFFSET)
189 pcie0_clk = (reg & SAR_PCIE0_CLK_CFG_MASK) >> SAR_PCIE0_CLK_CFG_OFFSET; in cp110_pcie_clk_cfg()

Completed in 3 milliseconds