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Searched refs:SE0_INT_STATUS_REG_OFFSET (Results 1 – 4 of 4) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t186/drivers/se/
A Dse.c43 val = tegra_se_read_32(SE0_INT_STATUS_REG_OFFSET); in tegra_se_operation_complete()
93 val = tegra_se_read_32(SE0_INT_STATUS_REG_OFFSET); in tegra_se_start_normal_operation()
95 tegra_se_write_32(SE0_INT_STATUS_REG_OFFSET, 0x00000U); in tegra_se_start_normal_operation()
A Dse_private.h64 #define SE0_INT_STATUS_REG_OFFSET U(0x184) macro
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t194/drivers/se/
A Dse.c198 val = tegra_se_read_32(SE0_INT_STATUS_REG_OFFSET); in tegra_se_sha256_hash_operation_complete()
200 val = tegra_se_read_32(SE0_INT_STATUS_REG_OFFSET); in tegra_se_sha256_hash_operation_complete()
250 val = tegra_se_read_32(SE0_INT_STATUS_REG_OFFSET); in tegra_se_start_normal_operation()
252 tegra_se_write_32(SE0_INT_STATUS_REG_OFFSET, 0x0U); in tegra_se_start_normal_operation()
A Dse_private.h74 #define SE0_INT_STATUS_REG_OFFSET U(0x184) macro

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