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Searched refs:SETR_32 (Results 1 – 6 of 6) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/renesas/common/emmc/
A Demmc_cmd.c64 SETR_32(SD_INFO1, 0x00000000U); in emmc_softreset()
65 SETR_32(SD_INFO2, SD_INFO2_CLEAR); in emmc_softreset()
175 SETR_32(DM_CM_INFO1_MASK, in emmc_data_transfer_dma()
177 SETR_32(DM_CM_INFO2_MASK, in emmc_data_transfer_dma()
184 SETR_32(DM_CM_INFO1_MASK, in emmc_data_transfer_dma()
186 SETR_32(DM_CM_INFO2_MASK, in emmc_data_transfer_dma()
253 SETR_32(SD_INFO2_MASK, in emmc_exec_cmd()
338 SETR_32(SD_INFO2_MASK, in emmc_exec_cmd()
384 SETR_32(SD_INFO2_MASK, in emmc_exec_cmd()
388 SETR_32(SD_INFO2_MASK, in emmc_exec_cmd()
[all …]
A Demmc_interrupt.c76 SETR_32(SD_INFO1, 0x00000000U); /* interrupt clear */ in emmc_interrupt()
77 SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* interrupt clear */ in emmc_interrupt()
102 SETR_32(SD_INFO1_MASK, 0x00000000U); in emmc_interrupt()
103 SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); in emmc_interrupt()
104 SETR_32(SD_INFO1, 0x00000000U); in emmc_interrupt()
106 SETR_32(SD_INFO2, SD_INFO2_CLEAR); in emmc_interrupt()
117 SETR_32(DM_CM_INFO1, 0x00000000U); in emmc_interrupt()
118 SETR_32(DM_CM_INFO2, 0x00000000U); in emmc_interrupt()
133 SETR_32(DM_CM_INFO1, 0x00000000U); in emmc_interrupt()
134 SETR_32(DM_CM_INFO2, 0x00000000U); in emmc_interrupt()
[all …]
A Demmc_init.c85 SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */ in emmc_dev_finalize()
86 SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */ in emmc_dev_finalize()
87 SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ in emmc_dev_finalize()
88 SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ in emmc_dev_finalize()
89 SETR_32(SD_CLK_CTRL, 0x00000000U); /* MMC clock stop */ in emmc_dev_finalize()
113 SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */ in emmc_dev_init()
114 SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */ in emmc_dev_init()
115 SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ in emmc_dev_init()
116 SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ in emmc_dev_init()
118 SETR_32(HOST_MODE, 0x00000000U); /* SD_BUF access width = 64-bit */ in emmc_dev_init()
[all …]
A Demmc_read.c40 SETR_32(SD_SECCNT, count); in emmc_multiple_block_read()
41 SETR_32(SD_STOP, 0x00000100); in emmc_multiple_block_read()
43 SETR_32(CC_EXT_MODE, (CC_EXT_MODE_CLEAR | CC_EXT_MODE_DMASDRW_ENABLE)); in emmc_multiple_block_read()
A Demmc_mount.c184 SETR_32(SD_OPTION, in emmc_card_init()
198 SETR_32(SD_SIZE, EMMC_BLOCK_LENGTH); in emmc_card_init()
267 SETR_32(SD_OPTION, in emmc_high_speed()
299 SETR_32(SD_CLK_CTRL, value); /* on */ in emmc_clock_ctrl()
306 SETR_32(SD_CLK_CTRL, value); /* off */ in emmc_clock_ctrl()
345 SETR_32(SD_OPTION, in emmc_bus_width()
349 SETR_32(SD_OPTION, (GETR_32(SD_OPTION) & ~(BIT15 | BIT13))); in emmc_bus_width()
352 SETR_32(SD_OPTION, in emmc_bus_width()
458 SETR_32(SD_CLK_CTRL, dataL); in set_sd_clk()
469 SETR_32(SD_OPTION, 0x000060EEU); /* 8 bits width */ in emmc_get_partition_access()
[all …]
A Demmc_std.h24 #define SETR_32(r, v) (*(volatile uint32_t *)(r) = (v)) macro

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