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Searched refs:SGRF_DDR_RGN_DPLL_CLK (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/secure/
A Dsecure.h46 #define SGRF_DDR_RGN_DPLL_CLK BIT_WITH_WMSK(15) /* DDR PLL output clock */ macro
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/dram/
A Dsuspend.c120 SGRF_DDR_RGN_DPLL_CLK | in configure_sgrf()

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