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Searched refs:SMMU_GSR0_SECURE_ACR (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/drivers/smmu/
A Dsmmu.c37 val = tegra_smmu_read_32(smmu_id, SMMU_GSR0_SECURE_ACR); in tegra_smmu_init()
40 tegra_smmu_write_32(smmu_id, SMMU_GSR0_SECURE_ACR, val); in tegra_smmu_init()
64 val = tegra_smmu_read_32(smmu_id, SMMU_GSR0_SECURE_ACR); in tegra_smmu_init()
66 tegra_smmu_write_32(smmu_id, SMMU_GSR0_SECURE_ACR, val); in tegra_smmu_init()
81 val = tegra_smmu_read_32(smmu_id, SMMU_GSR0_SECURE_ACR); in tegra_smmu_verify()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/include/drivers/
A Dsmmu.h21 #define SMMU_GSR0_SECURE_ACR 0x10U macro
22 #define SMMU_GNSR_ACR (SMMU_GSR0_SECURE_ACR + 0x400U)

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