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Searched refs:SYSMGR_ECC_DDR0_MASK (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/intel/soc/common/include/
A Dsocfpga_system_manager.h46 #define SYSMGR_ECC_DDR0_MASK BIT(16) macro
A Dsocfpga_sip_svc.h141 SYSMGR_ECC_DDR0_MASK |\

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