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Searched refs:TEGRA_RES_SEMA_BASE (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/drivers/bpmp/
A Dbpmp.c26 return mmio_read_32(TEGRA_RES_SEMA_BASE + STA_OFFSET) & CH_MASK(ch); in channel_field()
41 mmio_write_32(TEGRA_RES_SEMA_BASE + CLR_OFFSET, CH_MASK(ch)); in signal_slave()
46 mmio_write_32(TEGRA_RES_SEMA_BASE + CLR_OFFSET, in free_master()
126 val = mmio_read_32(TEGRA_RES_SEMA_BASE + STA_OFFSET); in tegra_bpmp_init()
209 val = mmio_read_32(TEGRA_RES_SEMA_BASE + STA_OFFSET); in tegra_bpmp_resume()
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/include/t210/
A Dtegra_def.h94 #define TEGRA_RES_SEMA_BASE 0x60001000UL macro
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c417 val = mmio_read_32(TEGRA_RES_SEMA_BASE + STA_OFFSET); in tegra_soc_pwr_domain_power_down_wfi()

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