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Searched refs:TOPCKGEN_BASE (Results 1 – 10 of 10) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm.c39 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200)
43 #define CLK_SCP_CFG_1 (TOPCKGEN_BASE + 0x210)
A Dmt_spm_cond.c22 #define MT_LP_TZ_TOPCK_REG(ofs) (TOPCKGEN_BASE + ofs)
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/
A Dmt_spm.c40 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200)
44 #define CLK_SCP_CFG_1 (TOPCKGEN_BASE + 0x210)
A Dmt_spm_cond.c21 #define MT_LP_TZ_TOPCK_REG(ofs) (TOPCKGEN_BASE + ofs)
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/include/
A Dplatform_def.h25 #define TOPCKGEN_BASE (IO_PHYS + 0x00000000) macro
41 #define TOPCKGEN_BASE (IO_PHYS + 0x00000000) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/include/
A Dplatform_def.h42 #define TOPCKGEN_BASE (IO_PHYS + 0x0) macro
43 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x200)
44 #define CLK_SCP_CFG_1 (TOPCKGEN_BASE + 0x204)
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm.c39 #define CLK_SCP_CFG_0 (TOPCKGEN_BASE + 0x264)
A Dmt_spm_cond.c21 #define MT_LP_TZ_TOPCK_REG(ofs) (TOPCKGEN_BASE + ofs)
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/include/
A Dplatform_def.h39 #define TOPCKGEN_BASE (IO_PHYS + 0x00000000) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/include/
A Dplatform_def.h34 #define TOPCKGEN_BASE (IO_PHYS + 0x00000000) macro

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