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Searched refs:TRNG_BASE (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/arm/board/juno/
A Djuno_trng.c36 val = mmio_read_32(TRNG_BASE + TRNG_STATUS); in output_valid()
64 mmio_write_32(TRNG_BASE + TRNG_INTMASK, 0); in plat_get_entropy()
66 mmio_write_32(TRNG_BASE + TRNG_CONFIG, NSAMPLE_CLOCKS); in plat_get_entropy()
68 mmio_write_32(TRNG_BASE + TRNG_CONTROL, 2); in plat_get_entropy()
70 mmio_write_32(TRNG_BASE + TRNG_STATUS, 1); in plat_get_entropy()
77 mmio_write_32(TRNG_BASE + TRNG_CONTROL, 1); in plat_get_entropy()
84 crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 0)); in plat_get_entropy()
85 crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 4)); in plat_get_entropy()
88 crc_value = __crc32w(crc_value, mmio_read_32(TRNG_BASE + 8)); in plat_get_entropy()
93 mmio_write_32(TRNG_BASE + TRNG_STATUS, 1); in plat_get_entropy()
[all …]
A Djuno_def.h62 #define TRNG_BASE UL(0x7FE60000) macro
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/include/
A Dmt8173_def.h28 #define TRNG_BASE (IO_PHYS + 0x20F000) macro

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