Searched refs:UART_LCR (Results 1 – 5 of 5) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/mediatek/drivers/uart/ |
| A D | uart.c | 30 mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); in mt_uart_restore()
32 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_restore()
39 mmio_write_32(UART_LCR(base), in mt_uart_restore()
43 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_restore()
70 uart->registers.lcr = mmio_read_32(UART_LCR(base)); in mt_uart_save()
72 mmio_write_32(UART_LCR(base), UART_LCR_MODE_B); in mt_uart_save()
74 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_save()
81 mmio_write_32(UART_LCR(base), in mt_uart_save()
85 mmio_write_32(UART_LCR(base), uart->registers.lcr); in mt_uart_save()
|
| A D | uart8250.h | 16 #define UART_LCR 0x0c /* Line control register */ macro
|
| A D | 8250_console.S | 69 str w1, [x0, #UART_LCR]
80 str w1, [x0, #UART_LCR]
|
| A D | uart.h | 29 #define UART_LCR(_baseaddr) (_baseaddr + 0xc) macro
|
| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/pmu/ |
| A D | pmu.c | 1132 #define UART_LCR 0x0c macro
1152 uart_save.uart_lcr = mmio_read_32(uart_base + UART_LCR); in suspend_uart()
1155 mmio_write_32(uart_base + UART_LCR, in suspend_uart()
1159 mmio_write_32(uart_base + UART_LCR, uart_save.uart_lcr); in suspend_uart()
1173 uart_lcr = mmio_read_32(uart_base + UART_LCR); in resume_uart()
1175 mmio_write_32(uart_base + UART_LCR, uart_lcr | UARTLCR_DLAB); in resume_uart()
1178 mmio_write_32(uart_base + UART_LCR, uart_save.uart_lcr); in resume_uart()
|
Completed in 9 milliseconds