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Searched refs:__COHERENT_RAM_START__ (Results 1 – 14 of 14) sorted by relevance

/arm-trusted-firmware-2.8.0/bl32/tsp/
A Dtsp.ld.S92 __COHERENT_RAM_START__ = .; define
119 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
/arm-trusted-firmware-2.8.0/bl2/
A Dbl2.ld.S97 __COHERENT_RAM_START__ = .; define
121 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
A Dbl2_el3.ld.S135 __COHERENT_RAM_START__ = .; define
179 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
/arm-trusted-firmware-2.8.0/bl32/sp_min/
A Dsp_min.ld.S115 __COHERENT_RAM_START__ = .; define
134 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
/arm-trusted-firmware-2.8.0/bl2/aarch64/
A Dbl2_entrypoint.S83 adrp x0, __COHERENT_RAM_START__
84 add x0, x0, :lo12:__COHERENT_RAM_START__
/arm-trusted-firmware-2.8.0/bl1/
A Dbl1.ld.S114 __COHERENT_RAM_START__ = .; define
145 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
/arm-trusted-firmware-2.8.0/bl2u/
A Dbl2u.ld.S95 __COHERENT_RAM_START__ = .; define
/arm-trusted-firmware-2.8.0/include/common/
A Dbl_common.h61 #define __COHERENT_RAM_START__ Load$$LR$$LR_COHERENT_RAM$$Base macro
153 IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE);
/arm-trusted-firmware-2.8.0/bl2/aarch32/
A Dbl2_entrypoint.S88 ldr r0, =__COHERENT_RAM_START__
/arm-trusted-firmware-2.8.0/bl31/
A Dbl31.ld.S158 __COHERENT_RAM_START__ = .; define
/arm-trusted-firmware-2.8.0/include/arch/aarch64/
A Del3_common_macros.S490 adrp x0, __COHERENT_RAM_START__
491 add x0, x0, :lo12:__COHERENT_RAM_START__
/arm-trusted-firmware-2.8.0/bl32/tsp/aarch64/
A Dtsp_entrypoint.S145 adrp x0, __COHERENT_RAM_START__
146 add x0, x0, :lo12:__COHERENT_RAM_START__
/arm-trusted-firmware-2.8.0/include/arch/aarch32/
A Del3_common_macros.S420 ldr r0, =__COHERENT_RAM_START__
/arm-trusted-firmware-2.8.0/docs/design/
A Dfirmware-design.rst1614 - ``__COHERENT_RAM_START__`` Must be aligned on a page-size boundary.

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