Searched refs:__builtin_ctz (Results 1 – 11 of 11) sorted by relevance
163 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()165 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()173 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()175 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()182 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
146 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()152 return ((gicv2_is_fiq_enabled() != 0U) ? __builtin_ctz(SCR_FIQ_BIT) : in plat_interrupt_type_to_line()153 __builtin_ctz(SCR_IRQ_BIT)); in plat_interrupt_type_to_line()
23 #define __builtin_ctz(a) __ctzsi2(a) macro
29 #define ctzsi __builtin_ctz
122 int __inline __builtin_ctz(uint32_t value) { in __builtin_ctz() function
243 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()246 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
167 uint32_t block_sh = __builtin_ctz(nbpages_per_block) + 1U; in spi_nand_load_page()185 uint32_t page_sh = __builtin_ctz(spinand_dev.nand_dev->page_size) + 1U; in spi_nand_read_from_cache()
141 idx = __builtin_ctz(lowest_set); in pm_client_set_wakeup_sources()
210 idx = __builtin_ctz(lowest_set); in pm_client_set_wakeup_sources()
86 return (int) __builtin_ctz(pe_data->active_pri_bits); in get_pe_highest_active_idx()
577 data_ctrl |= __builtin_ctz(arg_size) << SDMMC_DCTRLR_DBLOCKSIZE_SHIFT; in stm32_sdmmc2_prepare()
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