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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/
A Dapupwr_clkctl.c203 uint32_t acc_set0 = 0, acc_set1 = 0; in apupwr_smc_pll_set_rate() local
219 acc_set1 = APU_ACC_CONFG_SET5; in apupwr_smc_pll_set_rate()
228 acc_set1 = APU_ACC_CONFG_SET2; in apupwr_smc_pll_set_rate()
255 if (acc_set1) { in apupwr_smc_pll_set_rate()
256 apupwr_writel(BIT(BIT_SEL_APU_DIV2), acc_set1); in apupwr_smc_pll_set_rate()
273 if ((apupwr_readl(acc_set1) & BIT(BIT_CGEN_APU)) && in apupwr_smc_pll_set_rate()
274 !(apupwr_readl(acc_set1) & BIT(BIT_SEL_APU))) { in apupwr_smc_pll_set_rate()
286 if ((apupwr_readl(acc_set1) & BIT(BIT_CGEN_APU)) && in apupwr_smc_pll_set_rate()
287 !(apupwr_readl(acc_set1) & BIT(BIT_SEL_APU))) { in apupwr_smc_pll_set_rate()

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