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Searched refs:add_define (Results 1 – 25 of 119) sorted by relevance

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/arm-trusted-firmware-2.8.0/lib/cpus/
A Dcpu-ops.mk721 $(eval $(call add_define,ERRATA_A9_794073))
725 $(eval $(call add_define,ERRATA_A15_816470))
729 $(eval $(call add_define,ERRATA_A15_827671))
733 $(eval $(call add_define,ERRATA_A17_852421))
737 $(eval $(call add_define,ERRATA_A17_852423))
741 $(eval $(call add_define,ERRATA_A35_855472))
745 $(eval $(call add_define,ERRATA_A53_819472))
749 $(eval $(call add_define,ERRATA_A53_824069))
753 $(eval $(call add_define,ERRATA_A53_826319))
757 $(eval $(call add_define,ERRATA_A53_827319))
[all …]
/arm-trusted-firmware-2.8.0/plat/nxp/common/plat_make_helper/
A Dsoc_common_def.mk15 $(eval $(call add_define,NXP_HAS_${INTERCONNECT}))
18 $(eval $(call add_define,ICNNCT_ID))
23 $(eval $(call add_define,CONFIG_CHASSIS_${CHASSIS}))
27 $(eval $(call add_define,NXP_DDR_${PLAT_DDR_PHY}))
31 $(eval $(call add_define,CONFIG_PHYS_64BIT))
55 $(eval $(call add_define,SEC_MEM_NON_COHERENT))
63 $(eval $(call add_define,NXP_SFP_VER_${NXP_SFP_VER}))
67 $(eval $(call add_define,NXP_SFP_${NXP_SFP_ENDIANNESS}))
107 $(eval $(call add_define,NXP_DDR_INTLV_256B))
111 $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
[all …]
A Dplat_common_def.mk14 $(eval $(call add_define,CONFIG_POVDD_ENABLE))
18 $(eval $(call add_define,CONFIG_${FLASH_TYPE}))
43 $(eval $(call add_define,CONFIG_DDR_NODIMM))
56 $(eval $(call add_define,CONFIG_DDR_ADDR_DEC))
60 $(eval $(call add_define,CONFIG_DDR_ECC_EN))
64 $(eval $(call add_define,CONFIG_STATIC_DDR))
78 $$(eval $$(call add_define,QSPI_BOOT))
81 $$(eval $$(call add_define,SD_BOOT))
84 $$(eval $$(call add_define,EMMC_BOOT))
87 $$(eval $$(call add_define,NOR_BOOT))
[all …]
/arm-trusted-firmware-2.8.0/drivers/nxp/ddr/nxp-ddr/
A Dddr.mk8 $(eval $(call add_define, PHY_GEN2))
11 $(eval $(call add_define,NXP_APPLY_MAX_CDD))
15 $(eval $(call add_define,ERRATA_DDR_A011396))
19 $(eval $(call add_define,ERRATA_DDR_A050450))
23 $(eval $(call add_define,ERRATA_DDR_A050958))
32 $(eval $(call add_define,ERRATA_DDR_A008511))
36 $(eval $(call add_define,ERRATA_DDR_A009803))
50 $(eval $(call add_define, BIST_EN))
54 $(eval $(call add_define, DDR_DEBUG))
58 $(eval $(call add_define, DDR_PHY_DEBUG))
[all …]
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dplatform.mk33 $(eval $(call add_define,RCAR_LSI_CUT))
48 $(eval $(call add_define,RCAR_LSI_CUT))
139 $(eval $(call add_define,RCAR_LSI))
153 $(eval $(call add_define,RCAR_SECURE_BOOT))
159 $(eval $(call add_define,RCAR_QOS_TYPE))
165 $(eval $(call add_define,RCAR_DRAM_SPLIT))
203 $(eval $(call add_define,PMIC_LEVEL_MODE))
211 $(eval $(call add_define,BOARD_DEFAULT))
213 $(eval $(call add_define,RCAR_GEN3_ULCB))
219 $(eval $(call add_define,RCAR_REF_INT))
[all …]
/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dplatform.mk33 $(eval $(call add_define,RCAR_LSI_CUT))
48 $(eval $(call add_define,RCAR_LSI_CUT))
65 $(eval $(call add_define,RCAR_LSI_CUT))
87 $(eval $(call add_define,RCAR_LSI))
101 $(eval $(call add_define,RCAR_SECURE_BOOT))
124 $(eval $(call add_define,RCAR_QOS_TYPE))
130 $(eval $(call add_define,RCAR_DRAM_SPLIT))
165 $(eval $(call add_define,RCAR_REF_INT))
199 $(eval $(call add_define,RCAR_BL33_ARG0))
206 $(eval $(call add_define,RCAR_BL2_DCACHE))
[all …]
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/
A Dplatform.mk25 $(eval $(call add_define,DRIVER_CC_ENABLE))
69 $(eval $(call add_define,USE_DDR))
79 $(eval $(call add_define,USE_USB))
85 $(eval $(call add_define,USE_PAXB))
91 $(eval $(call add_define,USE_FS4))
97 $(eval $(call add_define,USE_FS6))
114 $(eval $(call add_define,USE_NAND))
120 $(eval $(call add_define,BCM_ELOG))
144 $(eval $(call add_define,USE_CHIMP))
150 $(eval $(call add_define,USE_PAXC))
[all …]
A Dbcm958742t.mk11 $(eval $(call add_define,BOARD_FAMILY))
15 $(eval $(call add_define,IHOST_REG_TYPE))
19 $(eval $(call add_define,VDDC_REG_TYPE))
/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Dcommon.mk45 $(eval $(call add_define,RCAR_H3))
46 $(eval $(call add_define,RCAR_M3))
47 $(eval $(call add_define,RCAR_M3N))
48 $(eval $(call add_define,RCAR_E3))
49 $(eval $(call add_define,RCAR_H3N))
50 $(eval $(call add_define,RCAR_D3))
51 $(eval $(call add_define,RCAR_V3M))
53 $(eval $(call add_define,RZ_G2M))
54 $(eval $(call add_define,RZ_G2H))
55 $(eval $(call add_define,RZ_G2N))
[all …]
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/generic/
A Dboard.mk8 $(eval $(call add_define,BL32_BASE))
11 $(eval $(call add_define,PRELOADED_BL33_BASE))
14 $(eval $(call add_define,K3_HW_CONFIG_BASE))
18 $(eval $(call add_define,K3_SEC_PROXY_LITE))
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/j784s4/
A Dboard.mk8 $(eval $(call add_define,BL32_BASE))
11 $(eval $(call add_define,PRELOADED_BL33_BASE))
14 $(eval $(call add_define,K3_HW_CONFIG_BASE))
18 $(eval $(call add_define,K3_SEC_PROXY_LITE))
/arm-trusted-firmware-2.8.0/plat/ti/k3/board/lite/
A Dboard.mk8 $(eval $(call add_define,BL32_BASE))
11 $(eval $(call add_define,PRELOADED_BL33_BASE))
14 $(eval $(call add_define,K3_HW_CONFIG_BASE))
18 $(eval $(call add_define,K3_SEC_PROXY_LITE))
/arm-trusted-firmware-2.8.0/plat/brcm/board/common/
A Dboard_common.mk12 $(eval $(call add_define,BOARD_CFG))
28 $(eval $(call add_define,SYSCNT_FREQ))
59 $(eval $(call add_define,ARM_BL31_IN_DRAM))
63 $(eval $(call add_define,MMU_DISABLED))
92 $(eval $(call add_define,BL2_LOG_LEVEL))
96 $(eval $(call add_define,BL31_LOG_LEVEL))
101 $(eval $(call add_define,USE_CRMU_SRAM))
110 $(eval $(call add_define,EMMC_USE_DMA))
202 $(eval $(call add_define,USE_FRU))
208 $(eval $(call add_define,USE_GPIO))
[all …]
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t210/
A Dplatform_t210.mk9 $(eval $(call add_define,TZDRAM_BASE))
12 $(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT))
15 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
18 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
21 $(eval $(call add_define,MAX_XLAT_TABLES))
24 $(eval $(call add_define,MAX_MMAP_REGIONS))
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t186/
A Dplatform_t186.mk10 $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
13 $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
25 $(eval $(call add_define,TZDRAM_BASE))
28 $(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
31 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
34 $(eval $(call add_define,MAX_XLAT_TABLES))
37 $(eval $(call add_define,MAX_MMAP_REGIONS))
/arm-trusted-firmware-2.8.0/tools/nxp/cert_create_helper/
A Dcert_create_tbbr.mk13 $(eval $(call add_define, PLAT_DEF_OID))
14 $(eval $(call add_define, PDEF_KEYS))
15 $(eval $(call add_define, PDEF_CERTS))
16 $(eval $(call add_define, PDEF_EXTS))
/arm-trusted-firmware-2.8.0/plat/marvell/
A Dmarvell.mk13 $(eval $(call add_define,MARVELL_SECURE_BOOT))
17 $(eval $(call add_define,PALLADIUM))
21 $(eval $(call add_define,DDR32))
/arm-trusted-firmware-2.8.0/drivers/arm/gic/v3/
A Dgicv3.mk38 $(eval $(call add_define,GICV3_SUPPORT_GIC600))
42 $(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU))
46 $(eval $(call add_define,GIC_ENABLE_V4_EXTN))
50 $(eval $(call add_define,GIC_EXT_INTID))
54 $(eval $(call add_define,GIC600_ERRATA_WA_2384374))
/arm-trusted-firmware-2.8.0/plat/rpi/rpi4/
A Dplatform.mk51 $(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
95 $(eval $(call add_define,RPI3_BL33_IN_AARCH32))
96 $(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
98 $(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
100 $(eval $(call add_define,RPI3_RUNTIME_UART))
101 $(eval $(call add_define,RPI3_USE_UEFI_MAP))
102 $(eval $(call add_define,SMC_PCI_SUPPORT))
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/
A Dplatform.mk12 $(eval $(call add_define,CRASH_REPORTING))
17 $(eval $(call add_define,PLAT_LOG_LEVEL_ASSERT))
21 $(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
61 $(eval $(call add_define,ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING))
62 $(eval $(call add_define,RELOCATE_BL32_IMAGE))
/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t194/
A Dplatform_t194.mk11 $(eval $(call add_define,ENABLE_CONSOLE_SPE))
14 $(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE))
17 $(eval $(call add_define,USE_GPC_DMA))
27 $(eval $(call add_define,TZDRAM_BASE))
30 $(eval $(call add_define,MAX_XLAT_TABLES))
33 $(eval $(call add_define,MAX_MMAP_REGIONS))
/arm-trusted-firmware-2.8.0/plat/nxp/common/fip_handler/ddr_fip/
A Dddr_fip_io.mk9 $(eval $(call add_define, PLAT_DEF_FIP_UUID))
10 $(eval $(call add_define, PLAT_TBBR_IMG_DEF))
14 $(eval $(call add_define,CONFIG_DDR_FIP_IMAGE))
/arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/
A Dplatform.mk36 $(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
39 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
44 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
47 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
52 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
57 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
62 $(eval $(call add_define,ZYNQMP_WDT_RESTART))
70 $(eval $(call add_define,IPI_CRC_CHECK))
74 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
/arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/
A Dplatform.mk27 $(eval $(call add_define,TFA_NO_PM))
31 $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE))
36 $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE))
39 $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE))
44 $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE))
49 $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE))
/arm-trusted-firmware-2.8.0/plat/ti/k3/common/
A Dplat_common.mk39 $(eval $(call add_define,TI_16550_MDR_QUIRK))
42 $(eval $(call add_define,K3_USART))
46 $(eval $(call add_define,K3_USART_BAUD))
50 $(eval $(call add_define,K3_PM_SYSTEM_SUSPEND))

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