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Searched refs:alignment (Results 1 – 7 of 7) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nvidia/tegra/scat/
A Dbl31.scat48 /* Ensure 8-byte alignment for descriptors and ensure inclusion */
55 /* Ensure 8-byte alignment for descriptors and ensure inclusion */
63 * Ensure 8-byte alignment for cpu_ops so that its fields are also
74 * security. GOT is a table of addresses so ensure 8-byte alignment.
104 * individual permissions to them, so the actual alignment needed is 4K.
135 * this section correctly. Ensure 8-byte alignment so that the fields of
/arm-trusted-firmware-2.8.0/plat/common/
A Dubsan.c28 unsigned long alignment; member
/arm-trusted-firmware-2.8.0/docs/components/
A Dgranule-protection-tables-design.rst214 Sample Calculation for L0 memory size and alignment
226 Sample calculation for L1 table size and alignment
A Dsdei.rst343 /* Save link register whilst maintaining stack alignment */
A Dsecure-partition-manager-mm.rst659 There are no alignment restrictions on the Base Address. The permission
732 The alignment of the Base Address must be greater than or equal to the size
/arm-trusted-firmware-2.8.0/docs/design/
A Dfirmware-design.rst252 bit. Alignment and stack alignment checking is enabled by setting the
1564 End address of a given section named ``<SECTION>``. If there is an alignment
1573 rounding up due to some alignment constraint.
1578 alignment constraint on the section's end address then ``__<SECTION>_SIZE__``
1586 rounding up due to some alignment constraint. In other words,
2295 The 2KB alignment for the exception vectors is an architectural
/arm-trusted-firmware-2.8.0/docs/
A Dchange-log.md4034 - Fixed incorrect alignment of TZDRAM base address
4267 - Reduce space lost to object alignment
4907 alignment is now supported on the Juno platform. When `USE_ROMLIB` is set
5247 - Code hygiene changes and alignment with MISRA C-2012 guideline with fixes
5470 - Code hygiene changes and alignment with MISRA guideline:
5520 alignment needed between memory attributes and attributes specified in
5890 to leave EL3 for a lower EL. This gives better alignment with the Arm ARM
6211 - Better alignment with version 1.0 of the PSCI specification.

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