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Searched refs:apupwr_setbits (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/
A Dapupll.c222 apupwr_setbits((post_div & POSDIV_MASK) << POSDIV_SHIFT, in _set_postdiv_reg()
278 apupwr_setbits(RG_PLL_EN, mixed_con0_addr[pll_idx]); in _pll_en()
296 apupwr_setbits(DA_PLL_SDM_PWR_ON, mixed_con3_addr[pll_idx]); in _pll_pwr()
315 apupwr_setbits(DA_PLL_SDM_ISO_EN, mixed_con3_addr[pll_idx]); in _pll_iso()
546 apupwr_setbits(PLL_TGL_ORG, fhctl_dds_addr[pll_idx]); in anpu_pll_set_rate()
A Dapupwr_clkctl_def.h75 #define apupwr_setbits(VAL, REG) mmio_setbits_32((uintptr_t)REG, VAL) macro

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