Searched refs:apupwr_smc_acc_set_parent (Results 1 – 2 of 2) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/ |
| A D | apupwr_clkctl.c | 220 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
222 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
229 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
231 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
236 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
241 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_PARKING, in apupwr_smc_pll_set_rate()
270 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_APUPLL, in apupwr_smc_pll_set_rate()
275 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_APUPLL, in apupwr_smc_pll_set_rate()
283 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_APUPLL, in apupwr_smc_pll_set_rate()
288 ret = apupwr_smc_acc_set_parent(DVFS_FREQ_ACC_APUPLL, in apupwr_smc_pll_set_rate()
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| A D | apupwr_clkctl.h | 15 int32_t apupwr_smc_acc_set_parent(uint32_t freq, uint32_t domain);
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