| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/pmu/ |
| A D | pmu.h | 72 #define SAVE_QOS(array, NAME) \ argument
74 #define RESTORE_QOS(array, NAME) \ argument
77 #define RK3399_CPU_AXI_SAVE_QOS(array, base) do { \ argument
78 array[0] = mmio_read_32(base + CPU_AXI_QOS_ID_COREID); \
80 array[2] = mmio_read_32(base + CPU_AXI_QOS_PRIORITY); \
81 array[3] = mmio_read_32(base + CPU_AXI_QOS_MODE); \
82 array[4] = mmio_read_32(base + CPU_AXI_QOS_BANDWIDTH); \
87 #define RK3399_CPU_AXI_RESTORE_QOS(array, base) do { \ argument
88 mmio_write_32(base + CPU_AXI_QOS_ID_COREID, array[0]); \
90 mmio_write_32(base + CPU_AXI_QOS_PRIORITY, array[2]); \
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| /arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/ |
| A D | pmu.h | 306 #define PX30_CPU_AXI_SAVE_QOS(array, base) do { \ argument
307 array[0] = mmio_read_32(base + CPU_AXI_QOS_ID_COREID); \
309 array[2] = mmio_read_32(base + CPU_AXI_QOS_PRIORITY); \
310 array[3] = mmio_read_32(base + CPU_AXI_QOS_MODE); \
311 array[4] = mmio_read_32(base + CPU_AXI_QOS_BANDWIDTH); \
316 #define PX30_CPU_AXI_RESTORE_QOS(array, base) do { \ argument
319 mmio_write_32(base + CPU_AXI_QOS_PRIORITY, array[2]); \
320 mmio_write_32(base + CPU_AXI_QOS_MODE, array[3]); \
326 #define SAVE_QOS(array, NAME) \ argument
327 PX30_CPU_AXI_SAVE_QOS(array, CPU_AXI_##NAME##_QOS_BASE)
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| /arm-trusted-firmware-2.8.0/tools/marvell/doimage/secure/ |
| A D | sec_img_7K.cfg | 5 # CSK keys array - 16 entries total.
14 # index of CSK key in the array. Valid range is 0 to 15
26 # SecureBootControl and EfuseBurnControl registers array
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| A D | sec_img_8K.cfg | 5 # CSK keys array - 16 entries total.
14 # index of CSK key in the array. Valid range is 0 to 15
26 # SecureBootControl and EfuseBurnControl registers array
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| /arm-trusted-firmware-2.8.0/lib/psa/ |
| A D | measured_boot.c | 17 static void print_byte_array(const uint8_t *array __unused, size_t len __unused) in print_byte_array()
22 if (array == NULL || len == 0U) { in print_byte_array()
26 (void)printf(" %02x", array[i]); in print_byte_array()
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| /arm-trusted-firmware-2.8.0/include/drivers/st/ |
| A D | stm32mp_clkfunc.h | 23 uint32_t *array);
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| /arm-trusted-firmware-2.8.0/docs/design/ |
| A D | psci-pd-tree.rst | 55 removed. A platform must define an array of unsigned chars such that:
57 #. The first entry in the array specifies the number of power domains at the
65 #. The size of the array minus the first entry will be equal to the number of
68 #. The value in each entry in the array is used to find the number of entries
70 all the entries at a level specifies the number of entries in the array for
110 This tree is defined by the platform as the array described above as follows:
143 relationship allows the core nodes to be allocated in a separate array
145 core in the array is the same as the return value from these APIs.
275 The ``psci_non_cpu_pd_nodes`` array will be populated as follows. The value in
296 Each core can find its node in the ``psci_cpu_pd_nodes`` array using the
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| A D | auth-framework.rst | 607 A CoT is defined as an array of pointers to ``auth_image_desc_t`` structures
625 This CoT consists of an array of pointers to image descriptors and it is
627 ``cot_desc`` must be the name of the array (passing a pointer or any other
652 CoT array, so the descriptors location in the array must match the identifiers.
673 - ``img_auth_methods``: this points to an array which defines the
701 - ``authenticated_data``: this array pointer indicates what authentication
873 is created in the ``authenticated_data`` array for that purpose. In that entry,
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| A D | firmware-design.rst | 935 the array, and determine its size.
957 service handler, the framework uses an array of 128 indices that map every
959 indicate the service is not handled. This ``rt_svc_descs_indices[]`` array is
966 ``rt_svc_descs[]`` array.
1326 Secure interrupt configuration are specified in an array of secure interrupt
1328 ``interrupt_props`` member points to an array of interrupt properties. Each
1329 element of the array specifies the interrupt number and its attributes
1330 (priority, group, configuration). Each element of the array shall be populated
1391 ``reset_func()``, ``cpu_pwr_down_ops`` (array of power down functions) and
1412 array and returns it. Note that only the part number and implementer fields
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| /arm-trusted-firmware-2.8.0/common/ |
| A D | fdt_wrappers.c | 79 uint32_t array[2] = {0, 0}; in fdt_read_uint64() local
82 ret = fdt_read_uint32_array(dtb, node, prop_name, 2, array); in fdt_read_uint64()
87 *value = ((uint64_t)array[0] << 32) | array[1]; in fdt_read_uint64()
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| /arm-trusted-firmware-2.8.0/docs/components/ |
| A D | ras.rst | 117 The platform is expected populate an array using the macros above, and register
119 passing it the name of the array describing the records. Note that the macro
120 must be used in the same file where the array is defined.
159 The platform is expected to define an array of ``struct ras_interrupt``, and
161 ``REGISTER_RAS_INTERRUPTS()``, passing it the name of the array. Note that the
162 macro must be used in the same file where the array is defined.
164 The array of ``struct ras_interrupt`` must be sorted in the increasing order of
219 sorted array of interrupts to look up the error record information associated
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| A D | ffa-manifest-binding.rst | 31 - value type: <prop-encoded-array>
32 - An array consisting of 4 <u32> values, identifying the UUID of the service
160 - value type: <prop-encoded-array>
252 - value type: <prop-encoded-array>
258 - value type: <prop-encoded-array>
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| A D | exception-handling.rst | 210 The platform expresses the chosen priority levels by declaring an array of
211 priority level descriptors. Each entry in the array is of type
217 The macro ``EHF_PRI_DESC()`` installs the descriptors in the array at a
218 computed index, and not necessarily where the macro is placed in the array.
219 The size of the array might therefore be larger than what it appears to be.
221 array.
223 Finally, this array of descriptors is exposed to |EHF| via the
606 priority scheme, the size of descriptor array exposed with
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| A D | sdei.rst | 97 - There must be exactly one descriptor in the private array, and none in the
98 shared array.
104 - Explicit events should only be used in the private array.
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| A D | granule-protection-tables-design.rst | 102 The programmer should provide the API with an array containing ``pas_region_t``
151 #. Firmware must call ``gpt_init_pas_l1_tables`` with a pointer to an array of
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| /arm-trusted-firmware-2.8.0/drivers/st/clk/ |
| A D | stm32mp_clkfunc.c | 177 uint32_t *array) in fdt_rcc_read_uint32_array() argument
191 return fdt_read_uint32_array(fdt, node, prop_name, count, array); in fdt_rcc_read_uint32_array()
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| /arm-trusted-firmware-2.8.0/plat/st/stm32mp1/ |
| A D | stm32mp1_scmi.c | 263 unsigned long *array, size_t *nb_elts) in plat_scmi_clock_rates_array() argument
275 if (array == NULL) { in plat_scmi_clock_rates_array()
278 *array = clk_get_rate(clock->clock_id); in plat_scmi_clock_rates_array()
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| /arm-trusted-firmware-2.8.0/docs/components/fconf/ |
| A D | amu-bindings.rst | 44 | | | | the ``reg`` property array of |
62 | ``reg`` | R | array | Represents the counter register |
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| A D | index.rst | 84 anything appropriate: structure, array, function, etc..
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| /arm-trusted-firmware-2.8.0/docs/resources/diagrams/plantuml/ |
| A D | fconf_bl1_load_config.puml | 28 in global dtb_infos array.
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| /arm-trusted-firmware-2.8.0/plat/allwinner/common/ |
| A D | arisc_off.S | 12 # The encoded instructions go into an array defined in
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| /arm-trusted-firmware-2.8.0/docs/process/ |
| A D | coding-guidelines.rst | 197 of the size of an array is the same.
218 my_struct.h:10:1: error: size of array ‘assert_my_struct_size_mismatch’ is negative
392 to a general, memory-mapped address, an array of pointers or another
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| /arm-trusted-firmware-2.8.0/docs/getting_started/ |
| A D | porting-guide.rst | 179 the array used for PSCI_STAT_COUNT/RESIDENCY accounting.
904 This function returns an array of SMMU addresses and the actual number of SMMUs
1307 error is usually an indication of an incorrect array size
2575 array of local power states where each index corresponds to a power domain
2597 residency statistics. For higher levels (array indices > 0), the residency
2615 residency statistics. For higher levels (array indices > 0), the residency
2672 This function returns a pointer to the byte array containing the power domain
2673 topology tree description. The format and method to construct this array are
2677 the array is populated dynamically, then plat_core_pos_by_mpidr() and
2886 populate it in ``req_state`` (second argument) array as power domain level
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| A D | psci-lib-integration-guide.rst | 368 For example, SP-MIN stores the pointers in the array ``sp_min_cpu_ctx_ptr``
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| /arm-trusted-firmware-2.8.0/docs/threat_model/ |
| A D | threat_model.rst | 635 | | buffer overflow, incorrect array boundary checks, |
|