| /arm-trusted-firmware-2.8.0/drivers/nxp/i2c/ |
| A D | i2c.c | 105 if (i2c_in(&ccsr_i2c->ad) == (chip << 1)) { in i2c_write_addr()
123 VERBOSE("Before writing chip %d\n", chip); in i2c_write_addr()
126 ret = tx_byte(ccsr_i2c, chip << 1); in i2c_write_addr()
200 int i2c_read(unsigned char chip, int addr, int alen, in i2c_read() argument
207 ret = i2c_write_addr(ccsr_i2c, chip, addr, alen); in i2c_read()
217 ret = tx_byte(ccsr_i2c, (chip << 1) | 1); in i2c_read()
223 return read_data(ccsr_i2c, chip, buf, len); in i2c_read()
232 ret = i2c_write_addr(ccsr_i2c, chip, addr, alen); in i2c_write()
237 return write_data(ccsr_i2c, chip, buf, len); in i2c_write()
240 int i2c_probe_chip(unsigned char chip) in i2c_probe_chip() argument
[all …]
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| /arm-trusted-firmware-2.8.0/include/drivers/nxp/i2c/ |
| A D | i2c.h | 46 int i2c_read(unsigned char chip, int addr, int alen,
48 int i2c_write(unsigned char chip, int addr, int alen,
50 int i2c_probe_chip(unsigned char chip);
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| /arm-trusted-firmware-2.8.0/include/drivers/marvell/ |
| A D | i2c.h | 14 int i2c_read(uint8_t chip,
17 int i2c_write(uint8_t chip,
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| /arm-trusted-firmware-2.8.0/include/drivers/mentor/ |
| A D | mi2cv.h | 34 int i2c_read(uint8_t chip,
37 int i2c_write(uint8_t chip,
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| /arm-trusted-firmware-2.8.0/drivers/mentor/i2c/ |
| A D | mi2cv.c | 273 static int mentor_i2c_probe(uint8_t chip) in mentor_i2c_probe() argument
285 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE); in mentor_i2c_probe()
390 static int mentor_i2c_target_offset_set(uint8_t chip, uint32_t addr, int alen) in mentor_i2c_target_offset_set() argument
487 int i2c_read(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len) in i2c_read() argument
493 mentor_i2c_probe(chip); in i2c_read()
517 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE); in i2c_read()
521 ret = mentor_i2c_target_offset_set(chip, addr, alen); in i2c_read()
529 ret = mentor_i2c_address_set(chip, I2C_CMD_READ); in i2c_read()
566 int i2c_write(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len) in i2c_write() argument
588 ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE); in i2c_write()
[all …]
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| /arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/include/ |
| A D | bl33_info.h | 34 struct chip_info chip; member
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| /arm-trusted-firmware-2.8.0/docs/plat/ |
| A D | mt8183.rst | 5 The chip incorporates eight cores - four Cortex-A53 little cores and Cortex-A73.
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| A D | mt8186.rst | 5 The chip incorporates eight cores - six Cortex-A55 little cores and two Cortex-A76.
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| A D | mt8192.rst | 5 The chip incorporates eight cores - four Cortex-A55 little cores and Cortex-A76.
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| A D | mt8195.rst | 5 The chip incorporates eight cores - four Cortex-A55 little cores and Cortex-A76.
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| A D | socionext-uniphier.rst | 8 image from a non-volatile storage to the on-chip SRAM, and jumps over to it.
14 `UniPhier BL`_. This loader runs in the on-chip SRAM, initializes the DRAM,
27 ROM (and verified if the chip fuses are blown).
36 compressed-BL2 appended) into the on-chip SRAM. If the SoC fuses are blown,
41 This runs in the on-chip SRAM. After the minimum SoC initialization and DRAM
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| A D | mt8188.rst | 5 The chip incorporates eight cores - six Cortex-A55 little cores and two Cortex-A78.
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| /arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/fdts/ |
| A D | n1sdp_nt_fw_config.dts | 19 secondary-chip-count = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/sgi575/fdts/ |
| A D | sgi575_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/rde1edge/fdts/ |
| A D | rde1edge_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/rdv1/fdts/ |
| A D | rdv1_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/rdv1mc/fdts/ |
| A D | rdv1mc_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn1edge/fdts/ |
| A D | rdn1edge_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/ |
| A D | platform.mk | 54 FDT_SOURCES += fdts/${PLAT}-single-chip.dts \
55 fdts/${PLAT}-multi-chip.dts \
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| /arm-trusted-firmware-2.8.0/plat/arm/board/morello/fdts/ |
| A D | morello_nt_fw_config.dts | 21 remote-chip-count = <0x0>;
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| /arm-trusted-firmware-2.8.0/plat/arm/board/rdn2/fdts/ |
| A D | rdn2_nt_fw_config.dts | 20 multi-chip-mode = <0x0>;
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| /arm-trusted-firmware-2.8.0/drivers/nxp/ddr/nxp-ddr/ |
| A D | dimm.c | 22 int read_spd(unsigned char chip, void *buf, int len) in read_spd() argument
33 ret = i2c_read(chip, 0, 1, buf, 256); in read_spd()
36 ret = i2c_read(chip, 0, 1, buf + 256, min(256, len - 256)); in read_spd()
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| /arm-trusted-firmware-2.8.0/include/drivers/nxp/ddr/ |
| A D | dimm.h | 326 int read_spd(unsigned char chip, void *buf, int len);
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| /arm-trusted-firmware-2.8.0/fdts/ |
| A D | n1sdp-multi-chip.dts | 6 #include "n1sdp-single-chip.dts"
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| A D | fvp-ve-Cortex-A5x1.dts | 117 /* Test chip gate configuration */
|