| /arm-trusted-firmware-2.8.0/include/lib/ |
| A D | mmio.h | 33 uint16_t clear, in mmio_clrsetbits_16() argument
36 mmio_write_16(addr, (mmio_read_16(addr) & ~clear) | set); in mmio_clrsetbits_16()
59 static inline void mmio_clrbits_32(uintptr_t addr, uint32_t clear) in mmio_clrbits_32() argument
61 mmio_write_32(addr, mmio_read_32(addr) & ~clear); in mmio_clrbits_32()
70 uint32_t clear, in mmio_clrsetbits_32() argument
73 mmio_write_32(addr, (mmio_read_32(addr) & ~clear) | set); in mmio_clrsetbits_32()
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| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/m0/include/ |
| A D | rk3399_mcu.h | 18 #define mmio_clrbits_32(addr, clear) \ argument
19 mmio_write_32(addr, (mmio_read_32(addr) & ~(clear)))
22 #define mmio_clrsetbits_32(addr, clear, set) \ argument
23 mmio_write_32(addr, (mmio_read_32(addr) & ~(clear)) | (set))
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| /arm-trusted-firmware-2.8.0/include/drivers/nxp/dcfg/ |
| A D | scfg.h | 51 #define scfg_clrsetbits32(a, clear, set) \ argument
52 mmio_clrsetbits_32((uintptr_t)(a), clear, set)
58 #define scfg_clrsetbits32(a, clear, set) \ argument
59 mmio_clrsetbits_32((uintptr_t)(a), clear, set)
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| /arm-trusted-firmware-2.8.0/drivers/imx/usdhc/ |
| A D | imx_usdhc.h | 133 #define mmio_clrsetbits32(addr, clear, set) mmio_write_32(addr, (mmio_read_32(addr) & ~(clear)) | (… argument
134 #define mmio_clrbits32(addr, clear) mmio_write_32(addr, mmio_read_32(addr) & ~(clear)) argument
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| /arm-trusted-firmware-2.8.0/plat/allwinner/common/ |
| A D | arisc_off.S | 66 l.and r5, r5, r6 # clear bit to ...
84 l.movhi r0, 0 # clear r0
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| /arm-trusted-firmware-2.8.0/drivers/brcm/i2c/ |
| A D | i2c.c | 115 uint32_t clear, in iproc_i2c_reg_clearset() argument
122 mmio_clrsetbits_32((smbus + reg_addr), clear, set); in iproc_i2c_reg_clearset()
124 (void *)(smbus + reg_addr), clear, set); in iproc_i2c_reg_clearset()
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| /arm-trusted-firmware-2.8.0/docs/components/ |
| A D | ffa-manifest-binding.rst | 108 means the feature is supported, clear bit - not supported:
167 A set bit means the partition should be informed of the power event, clear
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| A D | platform-interrupt-controller-API.rst | 264 This API should clear the *Pending* status of the interrupt specified by first
268 writes to the GIC *Clear Pending Register* to clear the interrupt pending
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| A D | el3-spmc.rst | 282 - FF-A ID with bit 15 clear relates to VMs.
293 (FF-A ID bit 15 clear) and destination world to be secure (FF-A ID bit 15
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| A D | rmm-el3-comms-spec.rst | 517 to clear SVE registers if they have been used in Realm World. The same applies
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| A D | secure-partition-manager.rst | 855 - FF-A ID with bit 15 clear relates to VMs.
872 (FF-A ID bit 15 clear) and destination world to be secure (FF-A ID bit 15
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| /arm-trusted-firmware-2.8.0/docs/process/ |
| A D | code-review-guidelines.rst | 100 - The structure of the code is clear.
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| /arm-trusted-firmware-2.8.0/docs/plat/arm/fvp/ |
| A D | index.rst | 174 is undefined on the FVP platform and the FVP platform code doesn't clear it.
176 clear the mailbox at start-up.
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| /arm-trusted-firmware-2.8.0/docs/design_documents/ |
| A D | context_mgmt_rework.rst | 18 of a new Realm world and a separate Root world for EL3 firmware, it is clear
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| /arm-trusted-firmware-2.8.0/docs/ |
| A D | change-log.md | 198 …- add 100us delay after USB OTG SRC bit 0 clear ([66345b8](https://review.trustedfirmware.org/plug…
806 …- clear the entire digest array of Startup Locality event ([70b1c02](https://review.trustedfirmwar…
843 …- clear the message buffer ([e3a6fb8](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trus…
2366 …- add SYSCEXTMASK bit set/clear in scu_power_up ([63a7a34](https://review.trustedfirmware.org/plug…
|