Searched refs:cp_index (Results 1 – 10 of 10) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/common/include/ |
| A D | a8k_plat_def.h | 33 #define MVEBU_CP_REGS_BASE(cp_index) (MVEBU_AP_IO_BASE(0) + \ argument
34 (cp_index) * MVEBU_CP_OFFSET)
50 #define MVEBU_CP_MPP_REGS(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \ argument
52 #define MVEBU_PM_MPP_REGS(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \ argument
54 #define MVEBU_CP_GPIO_DATA_OUT(cp_index, n) \ argument
55 (MVEBU_CP_REGS_BASE(cp_index) + \
57 #define MVEBU_CP_GPIO_DATA_OUT_EN(cp_index, n) \ argument
58 (MVEBU_CP_REGS_BASE(cp_index) + \
60 #define MVEBU_CP_GPIO_DATA_IN(cp_index, n) (MVEBU_CP_REGS_BASE(cp_index) + \ argument
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/common/mss/ |
| A D | mss_scp_bootloader.c | 230 int ret, ap_idx, cp_index; in load_img_to_cm3() local
253 cp_index = cm3_type - 1; in load_img_to_cm3()
258 if (bl2_plat_get_cp_count(ap_idx) <= cp_index) { in load_img_to_cm3()
260 cp_index); in load_img_to_cm3()
265 cp_index, ap_idx); in load_img_to_cm3()
268 ap_idx, cp_index), in load_img_to_cm3()
270 ap_idx, cp_index)); in load_img_to_cm3()
280 cp_index = cm3_type - MG_CP0; in load_img_to_cm3()
281 if (bl2_plat_get_cp_count(0) <= cp_index) { in load_img_to_cm3()
283 cp_index); in load_img_to_cm3()
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| /arm-trusted-firmware-2.8.0/include/plat/marvell/armada/a8k/common/ |
| A D | armada_common.h | 57 int cp_index; member
90 int cp_index; member
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| /arm-trusted-firmware-2.8.0/drivers/marvell/mg_conf_cm3/ |
| A D | mg_conf_cm3.c | 41 int mg_image_load(uintptr_t src_addr, uint32_t size, int cp_index) in mg_image_load() argument
43 uintptr_t mg_regs = MG_CM3_SRAM_BASE(cp_index); in mg_image_load()
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| A D | mg_conf_cm3.h | 9 int mg_image_load(uintptr_t src_addr, uint32_t size, int cp_index);
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/common/ |
| A D | plat_pm.c | 518 info->cp_index, info->gpio_index)); in plat_marvell_power_off_gpio()
520 info->cp_index, info->gpio_index), in plat_marvell_power_off_gpio()
524 reg = mmio_read_32(MVEBU_PM_MPP_REGS(info->cp_index, in plat_marvell_power_off_gpio()
526 mmio_write_32(MVEBU_PM_MPP_REGS(info->cp_index, in plat_marvell_power_off_gpio()
545 info->cp_index, info->gpio_index)); in plat_marvell_power_off_gpio()
546 addr = MVEBU_CP_GPIO_DATA_OUT(info->cp_index, info->gpio_index); in plat_marvell_power_off_gpio()
561 info->cp_index, info->gpio_index), reg); in plat_marvell_power_off_gpio()
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| A D | plat_ble_setup.c | 651 mpp_address = MVEBU_CP_GPIO_DATA_IN(skip_im->info.test.cp_index, in ble_skip_image_gpio()
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/a70x0/board/ |
| A D | marvell_plat_config.c | 142 .info.test.cp_index = 0,
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/a70x0_amc/board/ |
| A D | marvell_plat_config.c | 139 .info.test.cp_index = 0,
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/a80x0/board/ |
| A D | marvell_plat_config.c | 193 .info.test.cp_index = 0,
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