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/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/emi_mpu/
A Demi_mpu.h25 #define SET_ACCESS_PERMISSION(apc_ary, lock, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
31 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
37 d9, d8, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
47 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/emi_mpu/
A Demi_mpu.h61 #define SET_ACCESS_PERMISSION(apc_ary, lock, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
67 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
73 d9, d8, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
83 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/emi_mpu/
A Demi_mpu.h43 #define SET_ACCESS_PERMISSON(d7, d6, d5, d4, d3, d2, d1, d0) \ argument
45 | ((d3) << 9) | ((d2) << 6) | ((d1) << 3) | (d0))
47 #define SET_ACCESS_PERMISSON(d3, d2, d1, d0) \ argument
48 (((d3) << 9) | ((d2) << 6) | ((d1) << 3) | (d0))
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/emi_mpu/
A Demi_mpu.h61 #define SET_ACCESS_PERMISSION(apc_ary, lock, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
67 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
73 d9, d8, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
83 (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) | \
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/emi_mpu/
A Demi_mpu.h63 #define SET_ACCESS_PERMISSION(apc_ary, lock, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
69 | (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) \
75 d9, d8, d7, d6, d5, d4, d3, d2, d1, d0) \ argument
85 | (((unsigned int) d3) << 9) | (((unsigned int) d2) << 6) \
/arm-trusted-firmware-2.8.0/include/drivers/partition/
A Defi.h27 #define EFI_GUID(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ argument
31 { (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } }
/arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_b/
A Dboot_init_dram_regdef.h24 #define DBMEMCONF_REG(d3, row, bank, col, dw) \ argument
25 (((d3) << 30) | ((row) << 24) | ((bank) << 16) | ((col) << 8) | (dw))

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