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Searched refs:el_status (Results 1 – 13 of 13) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/intel/soc/common/aarch64/
A Dplatform_common.c42 unsigned long el_status; in socfpga_get_spsr_for_bl33_entry() local
47 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in socfpga_get_spsr_for_bl33_entry()
48 el_status &= ID_AA64PFR0_ELX_MASK; in socfpga_get_spsr_for_bl33_entry()
50 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/marvell/armada/common/aarch64/
A Dmarvell_common.c110 unsigned long el_status; in marvell_get_spsr_for_bl33_entry() local
115 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in marvell_get_spsr_for_bl33_entry()
116 el_status &= ID_AA64PFR0_ELX_MASK; in marvell_get_spsr_for_bl33_entry()
118 mode = (el_status) ? MODE_EL2 : MODE_EL1; in marvell_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/
A Dbl2_plat_setup.c63 unsigned long el_status; in poplar_get_spsr_for_bl33_entry() local
68 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in poplar_get_spsr_for_bl33_entry()
69 el_status &= ID_AA64PFR0_ELX_MASK; in poplar_get_spsr_for_bl33_entry()
71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/intel/soc/agilex/
A Dbl2_plat_setup.c145 unsigned long el_status; in get_spsr_for_bl33_entry() local
150 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
151 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
153 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/intel/soc/stratix10/
A Dbl2_plat_setup.c144 unsigned long el_status; in get_spsr_for_bl33_entry() local
149 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
150 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
152 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/ti/k3/common/
A Dk3_bl31_setup.c45 unsigned long el_status; in k3_get_spsr_for_bl33_entry() local
50 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in k3_get_spsr_for_bl33_entry()
51 el_status &= ID_AA64PFR0_ELX_MASK; in k3_get_spsr_for_bl33_entry()
53 mode = (el_status) ? MODE_EL2 : MODE_EL1; in k3_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/socionext/synquacer/
A Dsq_bl31_setup.c93 unsigned long el_status; in sq_get_spsr_for_bl33_entry() local
98 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in sq_get_spsr_for_bl33_entry()
99 el_status &= ID_AA64PFR0_ELX_MASK; in sq_get_spsr_for_bl33_entry()
101 mode = (el_status) ? MODE_EL2 : MODE_EL1; in sq_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mn/
A Dimx8mn_bl31_setup.c87 unsigned long el_status; in get_spsr_for_bl33_entry() local
92 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
93 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
95 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mp/
A Dimx8mp_bl31_setup.c83 unsigned long el_status; in get_spsr_for_bl33_entry() local
88 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
89 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
91 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mq/
A Dimx8mq_bl31_setup.c93 unsigned long el_status; in get_spsr_for_bl33_entry() local
98 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
99 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
101 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mm/
A Dimx8mm_bl31_setup.c96 unsigned long el_status; in get_spsr_for_bl33_entry() local
101 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
102 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
104 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8qx/
A Dimx8qx_bl31_setup.c88 unsigned long el_status; in get_spsr_for_bl33_entry() local
93 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
94 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
96 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/imx/imx8qm/
A Dimx8qm_bl31_setup.c77 unsigned long el_status; in get_spsr_for_bl33_entry() local
82 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()
83 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()
85 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()

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