Searched refs:el_status (Results 1 – 13 of 13) sorted by relevance
42 unsigned long el_status; in socfpga_get_spsr_for_bl33_entry() local47 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in socfpga_get_spsr_for_bl33_entry()48 el_status &= ID_AA64PFR0_ELX_MASK; in socfpga_get_spsr_for_bl33_entry()50 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
110 unsigned long el_status; in marvell_get_spsr_for_bl33_entry() local115 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in marvell_get_spsr_for_bl33_entry()116 el_status &= ID_AA64PFR0_ELX_MASK; in marvell_get_spsr_for_bl33_entry()118 mode = (el_status) ? MODE_EL2 : MODE_EL1; in marvell_get_spsr_for_bl33_entry()
63 unsigned long el_status; in poplar_get_spsr_for_bl33_entry() local68 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in poplar_get_spsr_for_bl33_entry()69 el_status &= ID_AA64PFR0_ELX_MASK; in poplar_get_spsr_for_bl33_entry()71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
145 unsigned long el_status; in get_spsr_for_bl33_entry() local150 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()151 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()153 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
144 unsigned long el_status; in get_spsr_for_bl33_entry() local149 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()150 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()152 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
45 unsigned long el_status; in k3_get_spsr_for_bl33_entry() local50 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in k3_get_spsr_for_bl33_entry()51 el_status &= ID_AA64PFR0_ELX_MASK; in k3_get_spsr_for_bl33_entry()53 mode = (el_status) ? MODE_EL2 : MODE_EL1; in k3_get_spsr_for_bl33_entry()
93 unsigned long el_status; in sq_get_spsr_for_bl33_entry() local98 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in sq_get_spsr_for_bl33_entry()99 el_status &= ID_AA64PFR0_ELX_MASK; in sq_get_spsr_for_bl33_entry()101 mode = (el_status) ? MODE_EL2 : MODE_EL1; in sq_get_spsr_for_bl33_entry()
87 unsigned long el_status; in get_spsr_for_bl33_entry() local92 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()93 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()95 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
83 unsigned long el_status; in get_spsr_for_bl33_entry() local88 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()89 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()91 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
93 unsigned long el_status; in get_spsr_for_bl33_entry() local98 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()99 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()101 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
96 unsigned long el_status; in get_spsr_for_bl33_entry() local101 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()102 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()104 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
88 unsigned long el_status; in get_spsr_for_bl33_entry() local93 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()94 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()96 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
77 unsigned long el_status; in get_spsr_for_bl33_entry() local82 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry()83 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry()85 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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