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Searched refs:endianness (Results 1 – 15 of 15) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/
A Dsoc.def51 # Defining the endianness for NXP ESDHC
54 # Defining the endianness for NXP SFP
57 # Defining the endianness for NXP GPIO
60 # Defining the endianness for NXP SNVS
63 # Defining the endianness for NXP CCSR GUR register
66 # Defining the endianness for NXP FSPI register
69 # Defining the endianness for NXP SEC
72 # Defining the endianness for NXP DDR
/arm-trusted-firmware-2.8.0/plat/arm/common/aarch64/
A Dexecution_state_switch.c42 unsigned int el, endianness; in arm_execution_state_switch() local
113 endianness = ((sctlr & SCTLR_EE_BIT) != 0U) ? 1U : 0U; in arm_execution_state_switch()
131 endianness, DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
155 ((unsigned int) ((endianness != 0U) ? EP_EE_BIG : in arm_execution_state_switch()
/arm-trusted-firmware-2.8.0/include/drivers/nxp/qspi/
A Dqspi.h24 #error Please define CCSR QSPI register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/gpio/
A Dnxp_gpio.h38 #error Please define GPIO register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/ddr/
A Dddr_io.h30 #error Please define CCSR DDR register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/crypto/caam/
A Dcaam_io.h44 #error Please define CCSR SEC register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/sec_mon/
A Dsnvs.h33 #error Please define CCSR SNVS register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/dcfg/
A Dscfg.h61 #error Please define CCSR SCFG register endianness
A Ddcfg.h26 #error Please define CCSR GUR register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/sfp/
A Dsfp.h97 #error Please define CCSR SFP register endianness
/arm-trusted-firmware-2.8.0/include/drivers/nxp/sd/
A Dsd_mmc.h334 #error Please define CCSR ESDHC register endianness
/arm-trusted-firmware-2.8.0/drivers/nxp/flexspi/nor/
A Dfspi.h23 #error Please define FSPI register endianness
/arm-trusted-firmware-2.8.0/docs/components/
A Darm-sip-service.rst75 CPU endianness, however, is preserved from the previous execution state. Note
/arm-trusted-firmware-2.8.0/docs/design/
A Dfirmware-design.rst253 ``SCTLR_EL3.A`` and ``SCTLR_EL3.SA`` bits. Exception endianness is set to
283 Exception endianness is set to little-endian by clearing the
/arm-trusted-firmware-2.8.0/docs/
A Dchange-log.md2726 …- define endianness of scfg and gpio ([2475f63](https://review.trustedfirmware.org/plugins/gitiles…
2954 …- fix endianness checking ([fb90cfd](https://review.trustedfirmware.org/plugins/gitiles/TF-A/trust…

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