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/arm-trusted-firmware-2.8.0/plat/xilinx/versal/pm_service/
A Dpm_api_sys.h31 uintptr_t address, uint32_t flag);
36 uint32_t state, uint32_t flag);
40 uint8_t enable, uint32_t flag);
44 uint32_t value, uint32_t flag);
48 uint32_t flag);
50 uint32_t flag);
52 uint32_t flag);
54 uint32_t flag);
57 uint32_t *value, uint32_t flag);
62 uint32_t flag);
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A Dpm_api_sys.c80 uintptr_t address, uint32_t flag) in pm_self_suspend() argument
146 uint32_t flag) in pm_req_suspend() argument
230 uint32_t value, uint32_t flag) in pm_pll_set_param() argument
283 uint32_t flag) in pm_pll_set_mode() argument
309 uint32_t flag) in pm_pll_get_mode() argument
331 uint32_t flag) in pm_force_powerdown() argument
356 uint32_t flag) in pm_system_shutdown() argument
445 uint32_t *value, uint32_t flag) in pm_api_ioctl() argument
488 uint8_t enable, uint32_t flag) in pm_set_wakeup_source() argument
509 uint32_t flag) in pm_feature_check() argument
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/arm-trusted-firmware-2.8.0/include/bl31/
A Dinterrupt_mgmt.h65 #define get_interrupt_rm_flag(flag, ss) \ argument
66 ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
67 #define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss)) argument
68 #define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss))) argument
77 #define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT) argument
78 #define clr_interrupt_src_ss(flag) ((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT)) argument
79 #define get_interrupt_src_ss(flag) (((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \ argument
/arm-trusted-firmware-2.8.0/bl31/
A Dinterrupt_mgmt.c102 uint32_t flag, bit_pos; in set_scr_el3_from_rm() local
104 flag = get_interrupt_rm_flag(interrupt_type_flags, security_state); in set_scr_el3_from_rm()
106 intr_type_descs[type].scr_el3[security_state] = (u_register_t)flag << bit_pos; in set_scr_el3_from_rm()
114 cm_write_scr_el3_bit(security_state, bit_pos, flag); in set_scr_el3_from_rm()
151 uint32_t bit_pos, flag; in disable_intr_rm_local() local
155 flag = get_interrupt_rm_flag(INTR_DEFAULT_RM, security_state); in disable_intr_rm_local()
158 cm_write_scr_el3_bit(security_state, bit_pos, flag); in disable_intr_rm_local()
169 uint32_t bit_pos, flag; in enable_intr_rm_local() local
173 flag = get_interrupt_rm_flag(intr_type_descs[type].flags, in enable_intr_rm_local()
177 cm_write_scr_el3_bit(security_state, bit_pos, flag); in enable_intr_rm_local()
/arm-trusted-firmware-2.8.0/tools/encrypt_fw/src/
A Dmain.c89 unsigned long flag; in parse_fw_enc_status_flag() local
92 flag = strtoul(arg, &endptr, 16); in parse_fw_enc_status_flag()
93 if (*endptr != '\0' || flag > FW_ENC_WITH_BSSK) { in parse_fw_enc_status_flag()
98 *fw_enc_status = flag & FW_ENC_STATUS_FLAG_MASK; in parse_fw_enc_status_flag()
A Dcmd_opt.c30 long_opt[num_reg_opt].flag = 0; in cmd_opt_add()
/arm-trusted-firmware-2.8.0/plat/intel/soc/common/sip/
A Dsocfpga_sip_fcs.c855 uint32_t flag; in intel_fcs_get_digest_update_finalize() local
882 flag = 0; in intel_fcs_get_digest_update_finalize()
967 uint32_t flag; in intel_fcs_mac_verify_update_finalize() local
999 flag = 0; in intel_fcs_mac_verify_update_finalize()
1263 uint32_t flag; in intel_fcs_ecdsa_sha2_data_sign_update_finalize() local
1290 flag = 0; in intel_fcs_ecdsa_sha2_data_sign_update_finalize()
1294 flag |= FCS_CS_FIELD_FLAG_INIT; in intel_fcs_ecdsa_sha2_data_sign_update_finalize()
1370 uint32_t flag; in intel_fcs_ecdsa_sha2_data_sig_verify_update_finalize() local
1402 flag = 0; in intel_fcs_ecdsa_sha2_data_sig_verify_update_finalize()
1652 uint32_t flag; in intel_fcs_aes_crypt_update_finalize() local
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/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/gpio/
A Dmtgpio_common.h93 .flag = _flag, \
101 uint8_t flag; member
A Dmtgpio_common.c149 if (gpio_info.flag) { in mt_gpio_set_pull_chip()
214 if (gpio_info.flag) { in mt_gpio_get_pull_chip()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/drivers/spm/
A Dspm_mcdi.c410 unsigned int pwr_status, shift, i, flag = 0; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off() local
420 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
422 if (!flag) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
430 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
432 if (!flag) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
/arm-trusted-firmware-2.8.0/docs/getting_started/
A Dbuild-options.rst218 flag has to be enabled. 0 is the default.
450 flag depends on ``DECRYPTION_SUPPORT`` build flag.
453 This flag depends on ``DECRYPTION_SUPPORT`` build flag.
457 on ``DECRYPTION_SUPPORT`` build flag.
461 build flag.
540 This flag depends on ``DECRYPTION_SUPPORT`` build flag.
607 By default this flag is set to '0'. Enabling this flag builds BL1 and BL2 in
934 SDEI_SUPPORT build flag is enabled.
971 The default value of this flag is ``0``.
1002 This flag is disabled by default.
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/arm-trusted-firmware-2.8.0/docs/plat/arm/
A Darm-build-options.rst8 DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
11 flag.
37 - ``ARM_PLAT_MT``: This flag determines whether the Arm platform layer has to
38 cater for the multi-threading ``MT`` bit when accessing MPIDR. When this flag
41 this flag is 0. Note that this option is not used on FVP platforms.
46 State-ID yet. Hence this flag is used to configure whether to use the
47 recommended State-ID encoding or not. The default value of this flag is 0,
92 SBROM library must be specified via ``CCSBROM_LIB_PATH`` flag.
129 - ``CSS_DETECT_PRE_1_7_0_SCP``: Boolean flag to detect SCP version
135 - ``CSS_LOAD_SCP_IMAGES``: Boolean flag, which when set, adds SCP_BL2 and
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/arm-trusted-firmware-2.8.0/drivers/st/regulator/
A Dregulator_core.c382 int regulator_set_flag(struct rdev *rdev, uint16_t flag) in regulator_set_flag() argument
387 if (__builtin_popcount(flag) != 1) { in regulator_set_flag()
392 if ((flag == REGUL_ALWAYS_ON) || (flag == REGUL_BOOT_ON)) { in regulator_set_flag()
393 rdev->flags |= flag; in regulator_set_flag()
404 ret = rdev->desc->ops->set_flag(rdev->desc, flag); in regulator_set_flag()
410 rdev->desc->node_name, flag, ret); in regulator_set_flag()
414 rdev->flags |= flag; in regulator_set_flag()
/arm-trusted-firmware-2.8.0/include/drivers/st/
A Dregulator.h58 int regulator_set_flag(struct rdev *rdev, uint16_t flag);
83 int (*set_flag)(const struct regul_description *desc, uint16_t flag);
/arm-trusted-firmware-2.8.0/drivers/brcm/spi/
A Diproc_qspi.c149 const uint8_t *tx, uint8_t *rx, uint32_t flag) in mspi_xfer() argument
154 if (flag & SPI_XFER_QUAD) { in mspi_xfer()
223 if (bytes == 0 && (flag & SPI_XFER_END)) in mspi_xfer()
229 if (bytes == 0 && (flag & SPI_XFER_END)) in mspi_xfer()
/arm-trusted-firmware-2.8.0/tools/cert_create/src/
A Dcmd_opt.c30 long_opt[num_reg_opt].flag = 0; in cmd_opt_add()
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/drivers/pwrc/
A Dhisi_pwrc.c211 unsigned int flag = BIT((cluster<<2) + core + 16); in hisi_set_cpu_boot_flag() local
215 mmio_setbits_32(REG_SCBAKDATA3_OFFSET, flag); in hisi_set_cpu_boot_flag()
222 unsigned int flag = BIT((cluster<<2) + core + 16); in hisi_clear_cpu_boot_flag() local
226 mmio_clrbits_32(REG_SCBAKDATA3_OFFSET, flag); in hisi_clear_cpu_boot_flag()
/arm-trusted-firmware-2.8.0/tools/fiptool/
A Dwin_posix.h80 int *flag; member
A Dwin_posix.c220 if (longopts[loptn].flag != 0) { in getopt_1long()
221 *longopts[loptn].flag = result; in getopt_1long()
/arm-trusted-firmware-2.8.0/docs/process/
A Dsecurity-hardening.rst127 - The ``BRANCH_PROTECTION`` build flag can be used to enable Pointer
130 - The ``ENABLE_STACK_PROTECTOR`` build flag can be used to identify buffer
133 - The ``W`` build flag can be used to enable a number of compiler warning
164 NB: The ``Werror`` flag is enabled by default in TF-A and can be disabled by
165 setting the ``E`` build flag to 0.
/arm-trusted-firmware-2.8.0/plat/intel/soc/common/soc/
A Dsocfpga_mailbox.c186 if ((mailbox_resp_ctr.flag & MBOX_PAYLOAD_FLAG_BUSY) != 0) { in mailbox_read_response_async()
207 if ((mailbox_resp_ctr.flag & MBOX_PAYLOAD_FLAG_BUSY) != 0) { in mailbox_read_response_async()
222 mailbox_resp_ctr.flag |= MBOX_PAYLOAD_FLAG_BUSY; in mailbox_read_response_async()
251 mailbox_resp_ctr.flag = 0; in mailbox_read_response_async()
263 return (mailbox_resp_ctr.flag & MBOX_PAYLOAD_FLAG_BUSY) ? MBOX_BUSY : MBOX_NO_RESPONSE; in mailbox_read_response_async()
/arm-trusted-firmware-2.8.0/drivers/st/pmic/
A Dstm32mp_pmic.c419 static int pmic_set_flag(const struct regul_description *desc, uint16_t flag) in pmic_set_flag() argument
421 VERBOSE("%s: set_flag 0x%x\n", desc->node_name, flag); in pmic_set_flag()
423 switch (flag) { in pmic_set_flag()
/arm-trusted-firmware-2.8.0/tools/nxp/create_pbl/
A Dcreate_pbl.c327 int add_pbi_stop_cmd(FILE *fp_rcw_pbi_op, enum stop_command flag) in add_pbi_stop_cmd() argument
344 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
364 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
394 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
413 if (flag == CRC_STOP_COMMAND) { in add_pbi_stop_cmd()
/arm-trusted-firmware-2.8.0/drivers/nxp/auth/csf_hdr_parser/
A Dinput_bl2_ch272 # Please note that OUTPUT SG BIN is only required for 2041/3041/4080/5020/5040 when ESBC flag is no…
78 # Required for 4240/9164/1040/C290 only when ESBC flag is not set. [Mandatory]
/arm-trusted-firmware-2.8.0/drivers/st/uart/
A Dstm32_uart.c201 static int stm32_uart_wait_flag(struct stm32_uart_handle_s *huart, uint32_t flag) in stm32_uart_wait_flag() argument
205 while ((mmio_read_32(huart->base + USART_ISR) & flag) == 0U) { in stm32_uart_wait_flag()

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