Searched refs:handled (Results 1 – 18 of 18) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/common/aarch64/ |
| A D | plat_common.c | 86 int handled = ras_ea_handler(ea_reason, syndrome, cookie, handle, flags); in plat_default_ea_handler() local
87 if (handled != 0) in plat_default_ea_handler()
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| /arm-trusted-firmware-2.8.0/docs/design/ |
| A D | interrupt-framework-design.rst | 8 #. It should be possible to route interrupts meant to be handled by secure
17 #. It should be possible to route interrupts meant to be handled by
33 the exception level(s) it is handled in.
37 context. It is always handled in Secure-EL1.
41 current execution context. It is always handled in either Non-secure EL1
46 always handled in EL3.
134 is handled by non-secure software.
212 cannot be handled in EL3.
629 lower exception level using AArch64 or AArch32 are handled.
744 so that the interrupt can be handled.
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| A D | firmware-design.rst | 470 BL31 entrypoint. The exception is handled by the SMC exception handler
959 indicate the service is not handled. This ``rt_svc_descs_indices[]`` array is
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| /arm-trusted-firmware-2.8.0/docs/components/ |
| A D | exception-handling.rst | 29 FIQs and IRQs routed to EL3 are not required to be handled in EL3.
32 exceptions are targeted at and handled in EL3. For instance:
119 handled or delegated.
156 handled over to S-EL1.
367 being handled: for interrupts, this is implied when the interrupt is
404 #. The ``SMC`` is handled by the same dispatcher that handled the exception
481 handled, and Non-secure execution resumes after ``SMC`` instruction.
586 particular, when an interrupt is being handled by the PE (i.e., the interrupt is
612 exception descriptor and the programmed priority of interrupts handled by the
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| A D | ras.rst | 10 Non-secure world are routed to and handled in EL3.
181 handled when they occur, but only after the exceptions are unmasked again.
184 This means that all exceptions routed to EL3 are handled immediately. |TF-A|
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| A D | secure-partition-manager.rst | 724 are considered to be handled.
735 - Global, which are targeted to a FF-A endpoint and can be handled within any of
737 - Per-vCPU, which are targeted to a FF-A endpoint and to be handled within a
745 - Schedule Receiver Interrupt: non-secure physical interrupt to be handled by
751 - Notifications Pending Interrupt: virtual interrupt to be handled by the
962 The Hypervisor or OS kernel can issue the FFA_SPM_ID_GET call handled by the
1113 world to be handled if it triggers while execution is in secure world.
1213 handled by execution context of target SP, SPMC resumes current SP after signal
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| A D | secure-partition-manager-mm.rst | 394 The entry point for service requests that should be handled as Fast Calls is
525 Zero or a positive value indicates that the event was handled successfully.
530 or a runtime request was handled successfully.
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| A D | firmware-update.rst | 335 Once the SMC is handled, BL1 returns from exception to the normal world caller.
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| A D | el3-spmc.rst | 343 The Hypervisor or OS kernel can issue the FFA_SPM_ID_GET call handled by the
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| /arm-trusted-firmware-2.8.0/docs/threat_model/ |
| A D | threat_model_spm.rst | 878 | | - Both SRI and NPI can't be pended until handled |
944 | | interrupt could be pending for it to be handled in |
991 | | interrupt was handled. |
1067 | | SPMC implementation and needs to be handled in the |
1080 | | handled by normal world VMs.** |
1117 | | interrupts, if not handled timely, could compromise|
1149 | | interrupt on current CPU is handled. This allows SP|
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| A D | threat_model.rst | 674 | | errors are handled through condition checks that |
696 | Threat | | **Improperly handled SMC calls can leak register |
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| /arm-trusted-firmware-2.8.0/docs/ |
| A D | index.rst | 63 and process, how security disclosures are handled, and the guidelines for
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| A D | change-log.md | 1682 …- modify how configuration type is handled ([ec4f28e](https://review.trustedfirmware.org/plugins/g…
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| /arm-trusted-firmware-2.8.0/docs/design_documents/ |
| A D | drtm_poc.rst | 49 triggered as a SMC by DCE-Preamble and handled by D-CRTM, which launches the
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| A D | cmake_framework.rst | 73 conflict checking, these shall be handled by the configuration tool.
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| /arm-trusted-firmware-2.8.0/docs/getting_started/ |
| A D | build-options.rst | 470 handled at EL3, and a panic will result. The exception to this rule is when
518 supported and is planned to be handled explicilty in phase-2 implementation.
570 Group 0 interrupts are assumed to be handled by Secure EL1.
849 the FIQ are handled in monitor mode and non secure world is not allowed
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| A D | porting-guide.rst | 3371 received at EL3 while one is already being handled. I.e., a call to
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| /arm-trusted-firmware-2.8.0/docs/process/ |
| A D | coding-guidelines.rst | 289 error. This situation should be handled in one of the following ways:
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