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/arm-trusted-firmware-2.8.0/plat/marvell/armada/common/
A Dmarvell_ddr_info.c15 #define DRAM_CH0_MMAP_LOW_REG(iface, cs, base) \ argument
17 #define DRAM_CH0_MMAP_HIGH_REG(iface, cs, base) \ argument
18 (DRAM_CH0_MMAP_LOW_REG(iface, cs, base) + 4)
29 #define DRAM_CS_ENABLED(iface, cs, base) \ argument
30 (mmio_read_32(DRAM_CH0_MMAP_LOW_REG(iface, cs, base)) & \
32 #define GET_DRAM_REGION_SIZE_CODE(iface, cs, base) \ argument
33 (mmio_read_32(DRAM_CH0_MMAP_LOW_REG(iface, cs, base)) & \
81 uint8_t cs, iface; in mvebu_get_dram_size() local
83 for (iface = 0; iface < DRAM_MAX_IFACE; iface++) { in mvebu_get_dram_size()
87 if (!DRAM_CS_ENABLED(iface, cs, ap_base_addr)) in mvebu_get_dram_size()
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