| /arm-trusted-firmware-2.8.0/plat/qti/common/src/ |
| A D | qti_interrupt_svc.c | 27 uint32_t irq = QTI_INTR_INVALID_INT_NUM; in qti_el3_interrupt_handler() local
35 irq = plat_ic_acknowledge_interrupt(); in qti_el3_interrupt_handler()
37 qtiseclib_invoke_isr(irq, handle); in qti_el3_interrupt_handler()
40 if (irq < 1022U) { in qti_el3_interrupt_handler()
41 plat_ic_end_of_interrupt(irq); in qti_el3_interrupt_handler()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/drivers/gic600/ |
| A D | mt_gic_v3.h | 15 void mt_gic_set_pending(uint32_t irq);
24 uint32_t mt_irq_get_pending(uint32_t irq);
25 void mt_irq_set_pending(uint32_t irq);
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| A D | mt_gic_v3.c | 61 void mt_gic_set_pending(uint32_t irq) in mt_gic_set_pending() argument
63 gicv3_set_interrupt_pending(irq, plat_my_core_pos()); in mt_gic_set_pending()
179 uint32_t mt_irq_get_pending(uint32_t irq) in mt_irq_get_pending() argument
184 irq / 32 * 4); in mt_irq_get_pending()
185 val = (val >> (irq % 32)) & 1U; in mt_irq_get_pending()
190 void mt_irq_set_pending(uint32_t irq) in mt_irq_set_pending() argument
192 uint32_t bit = 1U << (irq % 32); in mt_irq_set_pending()
195 irq / 32 * 4, bit); in mt_irq_set_pending()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal/pm_service/ |
| A D | pm_client.c | 108 static enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq) in irq_to_pm_node_idx() argument
110 assert(irq <= IRQ_MAX); in irq_to_pm_node_idx()
111 return irq_node_map[irq]; in irq_to_pm_node_idx()
138 uint32_t idx, irq, lowest_set = reg & (-reg); in pm_client_set_wakeup_sources() local
142 irq = base_irq + idx; in pm_client_set_wakeup_sources()
144 if (irq > IRQ_MAX) { in pm_client_set_wakeup_sources()
148 node_idx = irq_to_pm_node_idx(irq); in pm_client_set_wakeup_sources()
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/common/ |
| A D | marvell_gicv2.c | 80 uint32_t irq; in a7k8k_pmu_interrupt_handler() local
85 irq = plat_ic_acknowledge_interrupt(); in a7k8k_pmu_interrupt_handler()
87 plat_ic_end_of_interrupt(irq); in a7k8k_pmu_interrupt_handler()
89 if (irq != MARVELL_IRQ_PIC0) { in a7k8k_pmu_interrupt_handler()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/include/ |
| A D | mt_gic_v3.h | 22 void mt_gic_set_pending(uint32_t irq);
23 uint32_t mt_gic_get_pending(uint32_t irq);
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| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/pm_service/ |
| A D | pm_client.c | 166 static enum pm_node_id irq_to_pm_node(uint32_t irq) in irq_to_pm_node() argument
168 assert(irq <= IRQ_MAX); in irq_to_pm_node()
169 return irq_node_map[irq]; in irq_to_pm_node()
208 uint32_t idx, ret, irq, lowest_set = reg & (-reg); in pm_client_set_wakeup_sources() local
211 irq = base_irq + idx; in pm_client_set_wakeup_sources()
213 if (irq > IRQ_MAX) { in pm_client_set_wakeup_sources()
217 node = irq_to_pm_node(irq); in pm_client_set_wakeup_sources()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/drivers/cirq/ |
| A D | mt_cirq.c | 139 static uint32_t mt_irq_get_pol(uint32_t irq) in mt_irq_get_pol() argument
145 if (irq < 32U) { in mt_irq_get_pol()
149 reg = ((irq - 32U) / 32U); in mt_irq_get_pol()
157 unsigned int mt_irq_get_sens(unsigned int irq) in mt_irq_get_sens() argument
166 config = (config >> (irq % 16U) * 2U) & 0x3; in mt_irq_get_sens()
299 uint32_t mt_irq_get_en(uint32_t irq) in mt_irq_get_en() argument
303 addr = BASE_GICD_BASE + GICD_ISENABLER + (irq / 32U) * 4U; in mt_irq_get_en()
306 val = (st >> (irq % 32U)) & 1U; in mt_irq_get_en()
476 void mt_irq_unmask_for_sleep_ex(uint32_t irq) in mt_irq_unmask_for_sleep_ex() argument
480 mask = 1U << (irq % 32U); in mt_irq_unmask_for_sleep_ex()
[all …]
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| A D | mt_cirq.h | 78 #define IRQ_TO_CIRQ_NUM(irq) ((irq) - (32U + CIRQ_SPI_START)) argument
97 void mt_irq_unmask_for_sleep_ex(uint32_t irq);
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/ddr/ |
| A D | dram.c | 96 uint32_t irq; in waiting_dvfs() local
98 irq = plat_ic_acknowledge_interrupt(); in waiting_dvfs()
99 if (irq < 1022U) { in waiting_dvfs()
100 plat_ic_end_of_interrupt(irq); in waiting_dvfs()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal/include/ |
| A D | plat_private.h | 37 int32_t request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/ |
| A D | plat_mt_gic.c | 66 void mt_gic_set_pending(uint32_t irq) in mt_gic_set_pending() argument
68 gicv3_set_interrupt_pending(irq, plat_my_core_pos()); in mt_gic_set_pending()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/include/ |
| A D | plat_private.h | 44 int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
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| /arm-trusted-firmware-2.8.0/plat/qti/qtiseclib/src/ |
| A D | qtiseclib_interface_stub.c | 77 void qtiseclib_invoke_isr(uint32_t irq, void *handle) in qtiseclib_invoke_isr() argument
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| /arm-trusted-firmware-2.8.0/fdts/ |
| A D | corstone700_fpga.dts | 21 smsc,irq-push-pull;
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| A D | corstone700_fvp.dts | 34 smsc,irq-push-pull;
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| A D | a5ds.dts | 154 smsc,irq-active-high;
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| A D | stm32mp151.dtsi | 257 st,irq-number = <6>;
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| /arm-trusted-firmware-2.8.0/plat/qti/qtiseclib/inc/ |
| A D | qtiseclib_interface.h | 80 void qtiseclib_invoke_isr(uint32_t irq, void *handle);
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| /arm-trusted-firmware-2.8.0/services/spd/tlkd/ |
| A D | tlkd_main.c | 62 int irq = plat_ic_get_pending_interrupt_id(); in tlkd_interrupt_handler() local
66 plat_ic_end_of_interrupt(irq); in tlkd_interrupt_handler()
94 SMC_RET4(s_cpu_context, (uint32_t)TLK_IRQ_FIRED, 0, (uint32_t)irq, 0); in tlkd_interrupt_handler()
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| /arm-trusted-firmware-2.8.0/docs/resources/diagrams/plantuml/ |
| A D | sdei_general.puml | 15 EL2->EL3: **SDEI_INTERRUPT_BIND**(irq)
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| /arm-trusted-firmware-2.8.0/docs/ |
| A D | license.rst | 84 - ``include/dt-bindings/interrupt-controller/irq.h``
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| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t194/drivers/include/ |
| A D | t194_nvg.h | 237 uint32_t irq : U(1); member
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| /arm-trusted-firmware-2.8.0/docs/components/ |
| A D | exception-handling.rst | 489 to be taken to S-EL1 [#irq]_, so would get a chance to populate the designated
500 .. [#irq] In case of GICv2, Non-secure interrupts while in S-EL1 were signalled
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