Searched refs:last_core (Results 1 – 3 of 3) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mq/ |
| A D | gpc.c | 57 void imx_pup_pdn_slot_config(int last_core, bool pdn) in imx_pup_pdn_slot_config() argument
65 mmio_setbits_32(IMX_GPC_BASE + SLTx_CFG(2), SLT_COREx_PUP(last_core)); in imx_pup_pdn_slot_config()
78 void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state) in imx_set_cluster_powerdown() argument
95 val &= ~COREx_IRQ_WUP(last_core); /* disable IRQ PUP for last core */ in imx_set_cluster_powerdown()
96 val |= COREx_LPM_PUP(last_core); /* enable LPM PUP for last core */ in imx_set_cluster_powerdown()
99 imx_pup_pdn_slot_config(last_core, true); in imx_set_cluster_powerdown()
108 imx_pup_pdn_slot_config(last_core, false); in imx_set_cluster_powerdown()
122 val &= ~COREx_LPM_PUP(last_core); /* disable C0's LPM PUP */ in imx_set_cluster_powerdown()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/ |
| A D | gpc_common.c | 143 void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state) in imx_set_cluster_powerdown() argument
189 void imx_set_sys_wakeup(unsigned int last_core, bool pdn) in imx_set_sys_wakeup() argument
195 mmio_clrsetbits_32(IMX_GPC_BASE + LPCR_A53_BSC, A53_CORE_WUP_SRC(last_core), in imx_set_sys_wakeup()
199 A53_CORE_WUP_SRC(last_core)); in imx_set_sys_wakeup()
209 mmio_write_32(IMX_GPC_BASE + gpc_imr_offset[last_core] + i * 4, in imx_set_sys_wakeup()
226 void imx_set_sys_lpm(unsigned int last_core, bool retention) in imx_set_sys_lpm() argument
244 imx_set_sys_wakeup(last_core, retention); in imx_set_sys_lpm()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/include/ |
| A D | gpc.h | 66 void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state);
68 void imx_set_sys_wakeup(unsigned int last_core, bool pdn);
69 void imx_set_sys_lpm(unsigned last_core, bool retention);
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