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Searched refs:mode (Results 1 – 25 of 212) sorted by relevance

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/arm-trusted-firmware-2.8.0/plat/arm/board/fvp/
A Dfvp_io_storage.c47 .mode = FOPEN_MODE_RB
51 .mode = FOPEN_MODE_RB
55 .mode = FOPEN_MODE_RB
59 .mode = FOPEN_MODE_RB
63 .mode = FOPEN_MODE_RB
67 .mode = FOPEN_MODE_RB
71 .mode = FOPEN_MODE_RB
75 .mode = FOPEN_MODE_RB
79 .mode = FOPEN_MODE_RB
83 .mode = FOPEN_MODE_RB
[all …]
/arm-trusted-firmware-2.8.0/drivers/renesas/common/iic_dvfs/
A Diic_dvfs.c194 uint8_t mode; in IIC_DVFS_FUNC() local
241 uint8_t mode; in IIC_DVFS_FUNC() local
268 uint8_t mode; in IIC_DVFS_FUNC() local
295 uint8_t mode; in IIC_DVFS_FUNC() local
320 uint8_t mode; in IIC_DVFS_FUNC() local
364 uint8_t mode; in IIC_DVFS_FUNC() local
389 uint8_t mode; in IIC_DVFS_FUNC() local
419 uint8_t mode; in IIC_DVFS_FUNC() local
445 uint8_t mode; in IIC_DVFS_FUNC() local
470 uint8_t mode; in IIC_DVFS_FUNC() local
[all …]
/arm-trusted-firmware-2.8.0/drivers/mtd/spi-mem/
A Dspi_mem.c28 unsigned int mode; member
191 int mode = 0; in spi_mem_init_slave() local
229 mode |= SPI_CPOL; in spi_mem_init_slave()
232 mode |= SPI_CPHA; in spi_mem_init_slave()
236 mode |= SPI_CS_HIGH; in spi_mem_init_slave()
240 mode |= SPI_3WIRE; in spi_mem_init_slave()
244 mode |= SPI_PREAMBLE; in spi_mem_init_slave()
254 mode |= SPI_TX_DUAL; in spi_mem_init_slave()
257 mode |= SPI_TX_QUAD; in spi_mem_init_slave()
272 mode |= SPI_RX_DUAL; in spi_mem_init_slave()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/cpu_pm/cpcv3_2/
A Dmt_cpu_pm_mbox.c26 void mtk_set_mcupm_pll_mode(unsigned int mode) in mtk_set_mcupm_pll_mode() argument
28 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
29 MCUPM_MBOX_WRITE(MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
38 void mtk_set_mcupm_buck_mode(unsigned int mode) in mtk_set_mcupm_buck_mode() argument
40 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
41 MCUPM_MBOX_WRITE(MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
/arm-trusted-firmware-2.8.0/include/drivers/amlogic/crypto/
A Dsha_dma.h22 enum ASD_MODE mode; member
26 static inline void asd_sha_init(struct asd_ctx *ctx, enum ASD_MODE mode) in asd_sha_init() argument
29 ctx->mode = mode; in asd_sha_init()
/arm-trusted-firmware-2.8.0/plat/nxp/common/setup/
A Dls_err.c28 uint32_t mode; in plat_error_handler() local
29 bool sb = check_boot_mode_secure(&mode); in plat_error_handler()
39 if (mode == 1U) { in plat_error_handler()
/arm-trusted-firmware-2.8.0/lib/zlib/
A Dinflate.c114 state->mode < HEAD || state->mode > SYNC)
130 state->mode = HEAD;
653 if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */
659 switch (state->mode) {
736 state->mode = OS;
1062 state->mode = LEN;
1219 state->mode = LEN;
1298 (state->mode == LEN_ || state->mode == COPY_ ? 256 : 0);
1368 state->mode = MEM;
1443 state->mode = SYNC;
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/arm-trusted-firmware-2.8.0/drivers/st/gpio/
A Dstm32_gpio.c104 uint32_t mode; in dt_set_gpio_config() local
120 switch (mode) { in dt_set_gpio_config()
122 mode = GPIO_MODE_INPUT; in dt_set_gpio_config()
125 alternate = mode - 1U; in dt_set_gpio_config()
126 mode = GPIO_MODE_ALTERNATE; in dt_set_gpio_config()
129 mode = GPIO_MODE_ANALOG; in dt_set_gpio_config()
132 mode = GPIO_MODE_OUTPUT; in dt_set_gpio_config()
143 if (mode == GPIO_MODE_INPUT) { in dt_set_gpio_config()
144 mode = GPIO_MODE_OUTPUT; in dt_set_gpio_config()
151 mode = GPIO_MODE_OUTPUT; in dt_set_gpio_config()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/dcm/
A Dmtk_dcm.c10 static void dcm_armcore(bool mode) in dcm_armcore() argument
12 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
13 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/dcm/
A Dmtk_dcm.c10 static void dcm_armcore(bool mode) in dcm_armcore() argument
12 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
13 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
/arm-trusted-firmware-2.8.0/plat/intel/soc/common/aarch64/
A Dplatform_common.c43 unsigned int mode; in socfpga_get_spsr_for_bl33_entry() local
50 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/brcm/common/
A Dbrcm_common.c41 unsigned int mode; in brcm_get_spsr_for_bl33_entry() local
45 mode = el_implemented(2) ? MODE_EL2 : MODE_EL1; in brcm_get_spsr_for_bl33_entry()
52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/dcm/
A Dmtk_dcm.c11 static void dcm_armcore(bool mode) in dcm_armcore() argument
13 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
15 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
/arm-trusted-firmware-2.8.0/drivers/st/spi/
A Dstm32_qspi.c225 if (mode == QSPI_CCR_MEM_MAP) { in stm32_qspi_tx()
246 uint8_t mode = QSPI_CCR_IND_WRITE; in stm32_qspi_exec_op() local
259 mode = QSPI_CCR_MEM_MAP; in stm32_qspi_exec_op()
261 mode = QSPI_CCR_IND_READ; in stm32_qspi_exec_op()
269 ccr = mode << QSPI_CCR_FMODE_SHIFT; in stm32_qspi_exec_op()
295 ret = stm32_qspi_tx(op, mode); in stm32_qspi_exec_op()
406 if ((mode & SPI_CS_HIGH) != 0U) { in stm32_qspi_set_mode()
410 if (((mode & SPI_CPHA) != 0U) && ((mode & SPI_CPOL) != 0U)) { in stm32_qspi_set_mode()
412 } else if (((mode & SPI_CPHA) == 0U) && ((mode & SPI_CPOL) == 0U)) { in stm32_qspi_set_mode()
420 if ((mode & SPI_RX_QUAD) != 0U) { in stm32_qspi_set_mode()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/mcdi/
A Dmt_mcdi.c83 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
85 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
86 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
90 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
92 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
93 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
/arm-trusted-firmware-2.8.0/plat/arm/common/
A Darm_common.c89 unsigned int mode; in arm_get_spsr_for_bl33_entry() local
93 mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1; in arm_get_spsr_for_bl33_entry()
100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
109 unsigned int hyp_status, mode, spsr; in arm_get_spsr_for_bl33_entry() local
113 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in arm_get_spsr_for_bl33_entry()
120 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/mcdi/
A Dmt_mcdi.c82 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
84 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
85 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
89 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
91 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
92 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/mcdi/
A Dmt_mcdi.c83 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
85 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
86 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
90 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
92 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
93 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
/arm-trusted-firmware-2.8.0/plat/nxp/common/tbbr/
A Dcsf_tbbr.c31 uint32_t mode = 0U; in plat_get_rotpk_info() local
36 if (check_boot_mode_secure(&mode) == true) { in plat_get_rotpk_info()
38 if (mode == 1U) { in plat_get_rotpk_info()
/arm-trusted-firmware-2.8.0/plat/qemu/common/
A Dqemu_io_storage.c122 .mode = FOPEN_MODE_RB
126 .mode = FOPEN_MODE_RB
130 .mode = FOPEN_MODE_RB
134 .mode = FOPEN_MODE_RB
138 .mode = FOPEN_MODE_RB
142 .mode = FOPEN_MODE_RB
147 .mode = FOPEN_MODE_RB
151 .mode = FOPEN_MODE_RB
155 .mode = FOPEN_MODE_RB
159 .mode = FOPEN_MODE_RB
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/dcm/
A Dmtk_dcm.c13 static void dcm_armcore(bool mode) in dcm_armcore() argument
15 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
16 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
17 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
/arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/
A Dbl2_plat_setup.c64 unsigned int mode; in poplar_get_spsr_for_bl33_entry() local
71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
78 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
84 unsigned int hyp_status, mode, spsr; in poplar_get_spsr_for_bl33_entry() local
88 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in poplar_get_spsr_for_bl33_entry()
95 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
/arm-trusted-firmware-2.8.0/plat/arm/board/fvp_r/
A Dfvp_r_io_storage.c33 .mode = FOPEN_MODE_RB
38 .mode = FOPEN_MODE_RB
42 .mode = FOPEN_MODE_RB
46 .mode = FOPEN_MODE_RB
/arm-trusted-firmware-2.8.0/plat/imx/common/include/sci/svc/pm/
A Dsci_pm_api.h235 sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode);
257 sc_pm_power_mode_t mode);
272 sc_pm_power_mode_t *mode);
307 sc_pm_power_mode_t mode);
322 sc_pm_power_mode_t *mode);
343 sc_pm_power_mode_t mode);
366 sc_pm_power_mode_t mode,
/arm-trusted-firmware-2.8.0/lib/debugfs/
A Ddev.c76 static bool is_valid_mode(int mode) in is_valid_mode() argument
78 if ((mode & O_READ) && (mode & (O_WRITE | O_RDWR))) { in is_valid_mode()
81 if ((mode & O_WRITE) && (mode & (O_READ | O_RDWR))) { in is_valid_mode()
84 if ((mode & O_RDWR) && (mode & (O_READ | O_WRITE))) { in is_valid_mode()
148 channel->mode = 0; in channel_clear()
363 new_channel->mode = channel->mode; in devclone()
443 dir->mode = mode; in make_dir_entry()
446 dir->mode |= O_DIR; in make_dir_entry()
476 int open(const char *path, int mode) in open() argument
484 if (is_valid_mode(mode) == false) { in open()
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