/arm-trusted-firmware-2.8.0/include/plat/marvell/armada/common/ |
A D | mvebu.h | 16 #define IS_NOT_ALIGN(number, align) ((number) & ((align) - 1)) argument 19 #define ALIGN_UP(number, align) (((number) & ((align) - 1)) ? \ argument 20 (((number) + (align)) & ~((align)-1)) : (number)) 23 #define IS_POWER_OF_2(number) ((number) != 0 && \ argument 24 (((number) & ((number) - 1)) == 0)) 32 #define ROUND_UP_TO_POW_OF_2(number) (1 << \ argument 33 (32 - __builtin_clz((number) - 1)))
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/arm-trusted-firmware-2.8.0/fdts/ |
A D | stm32mp157a-dhcor-avenger96.dts | 10 * DHCOR PCB number: 586-100 or newer 11 * Avenger96 PCB number: 588-200 or newer
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A D | stm32mp157c-dhcom-pdk2.dts | 8 * DHCOM PCB number: 587-200 or newer 9 * PDK2 PCB number: 516-400 or newer
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A D | fvp-base-psci-common.dtsi | 59 * 1. Event number 60 * 2. Interrupt number the event is bound to or 82 * 1. Interrupt number 181 frame-number = <1>;
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A D | fvp-foundation-gicv2-psci.dts | 123 frame-number = <1>;
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A D | fvp-foundation-gicv3-psci.dts | 132 frame-number = <1>;
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A D | a5ds.dts | 134 frame-number = <0>;
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A D | corstone700.dtsi | 107 frame-number = <0>;
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/arm-trusted-firmware-2.8.0/docs/design/ |
A D | psci-pd-tree.rst | 19 code is not scalable. The use of an MPIDR also restricts the number of 57 #. The first entry in the array specifies the number of power domains at the 62 #. Each subsequent entry corresponds to a power domain and contains the number 65 #. The size of the array minus the first entry will be equal to the number of 68 #. The value in each entry in the array is used to find the number of entries 69 to consider at the next level. The sum of the values (number of children) of 70 all the entries at a level specifies the number of entries in the array for 125 unique number (core index) between ``0`` and ``PLAT_CORE_COUNT - 1`` to each core 150 For platforms where the number of allocated MPIDRs is equal to the number of 158 used by the platform is not equal to the number of core power domains. [all …]
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/arm-trusted-firmware-2.8.0/docs/components/ |
A D | ffa-manifest-binding.rst | 14 by this node. The minor number is incremented if the binding changes in a 17 - X is an integer representing the major version number of this document. 18 - Y is an integer representing the minor version number of this document. 51 - In the absence of virtualization, this is the number of execution 53 - If value of this field = 1 and number of PEs > 1 then the partition is 56 capable partition irrespective of the number of PEs. 95 - A unique number amongst all partitions that specifies if this partition 96 must be booted before others. The partition with the smaller number will be 150 - The field specifies the general purpose register number but not its width. 152 the partition properties. For example, if the number value is 1 then the
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A D | sdei.rst | 32 the SDEI dispatcher returns a platform dynamic event number [2]. The client then 64 - The event number: this must be a positive 32-bit integer. 66 - For an event that has a backing interrupt, the interrupt number the event is 76 macro takes only one parameter: an SGI number to signal other PEs. 82 - The event number (as above); 113 - Both arrays must be sorted in the increasing order of event number. 225 The parameter ``ev_num`` is the event number to dispatch. The API returns ``0``
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A D | mpmm.rst | 26 limiting the number of cores that can execute higher-activity workloads or
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A D | rmm-el3-comms-spec.rst | 24 The RMM Boot and Runtime Interface uses a version number to check 29 uses a separate version number but with the same scheme. 31 The version number is a 32-bit type with the following fields: 52 - ``RES0``: Bit 31 of the version number is reserved 0 as to maintain 99 …x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of C… 101 …x2,Maximum number of CPUs to be supported at runtime. RMM should ensure that it can support this m… 144 …x0,Linear index of this PE. This index starts from 0 and must be less than the maximum number of C… 163 …``E_RMM_BOOT_CPU_ID_OUT_OF_RAGE``,Current CPU Id is higher or equal than the number of CPUs suppor…
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A D | arm-sip-service.rst | 256 This operation reads a number of bytes from a file descriptor obtained by 280 uint32_t w1: number of bytes read on success. 424 value with major version number in upper 16 bits and
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A D | ras.rst | 66 register-accessed record, the start index of the record and number of 154 - Interrupt number; 165 interrupt number. This allows for fast look of handlers in order to service RAS 220 with the interrupt number. That error handler for that record is then invoked to
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A D | cot-binding.rst | 6 'manifests' and 'images' nodes contains number of sub-nodes (i.e. 'certificate' 9 Also, device tree describes 'non-volatile-counters' node which contains number of
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/arm-trusted-firmware-2.8.0/docs/plat/marvell/armada/misc/ |
A D | mvebu-ccu.rst | 12 Return the CCU windows configuration and the number of windows of the
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A D | mvebu-amb.rst | 39 Returns the AMB windows configuration and the number of windows
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A D | mvebu-io-win.rst | 23 Returns the IO windows configuration and the number of windows of the
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A D | mvebu-iob.rst | 17 Returns the IOB windows configuration and the number of windows
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/arm-trusted-firmware-2.8.0/plat/allwinner/common/ |
A D | arisc_off.S | 19 # It expects the core number presented as a mask in the upper half of 69 l.ff1 r6, r3 # get core number from high mask 71 l.slli r6, r6, 2 # r5: core number*4 (0-12)
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/arm-trusted-firmware-2.8.0/docs/resources/diagrams/plantuml/ |
A D | sdei_general.puml | 16 EL3->EL2: event number: ev
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/arm-trusted-firmware-2.8.0/docs/plat/ |
A D | rockchip.rst | 4 Trusted Firmware-A supports a number of Rockchip ARM SoCs from both
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/arm-trusted-firmware-2.8.0/docs/getting_started/ |
A D | image-terminology.rst | 23 suffixed with a dash ("-") followed by a number (for example, ``BL3-1``) or a 24 subscript number, depending on whether rich text formatting was available. 47 binary. The number and type of images that should be packed in a FIP is 98 identifier, not a number.
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/arm-trusted-firmware-2.8.0/docs/security_advisories/ |
A D | security-advisory-tfv-5.rst | 30 Performance Monitors implementation, including the number of counters
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