| /arm-trusted-firmware-2.8.0/plat/nxp/common/tbbr/ |
| A D | x509_tbbr.c | 32 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
39 assert(nv_ctr != NULL); in plat_get_nv_ctr()
54 *nv_ctr = 0U; in plat_get_nv_ctr()
56 *nv_ctr = (32U - __builtin_clz(val)); in plat_get_nv_ctr()
59 INFO("NV Counter value for UID %d is %d\n", uid_num, *nv_ctr); in plat_get_nv_ctr()
64 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
72 if (nv_ctr > 32U) { in plat_set_nv_ctr()
84 sfp_val = (1U << (nv_ctr - 1)); in plat_set_nv_ctr()
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| A D | csf_tbbr.c | 67 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
73 *nv_ctr = 0U; in plat_get_nv_ctr()
78 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/drivers/auth/cryptocell/712/ |
| A D | cryptocell_plat_helpers.c | 75 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
81 CC_SW_VERSION_COUNTER1, nv_ctr); in plat_get_nv_ctr()
84 CC_SW_VERSION_COUNTER2, nv_ctr); in plat_get_nv_ctr()
99 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
105 CC_SW_VERSION_COUNTER1, nv_ctr); in plat_set_nv_ctr()
108 CC_SW_VERSION_COUNTER2, nv_ctr); in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/drivers/auth/cryptocell/713/ |
| A D | cryptocell_plat_helpers.c | 71 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
77 CC_SW_VERSION_TRUSTED, nv_ctr); in plat_get_nv_ctr()
80 CC_SW_VERSION_NON_TRUSTED, nv_ctr); in plat_get_nv_ctr()
95 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
101 CC_SW_VERSION_TRUSTED, nv_ctr); in plat_set_nv_ctr()
104 CC_SW_VERSION_NON_TRUSTED, nv_ctr); in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/plat/arm/board/morello/ |
| A D | morello_trusted_boot.c | 17 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
19 *nv_ctr = MORELLO_FW_NVCTR_VAL; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/arm/board/corstone1000/common/ |
| A D | corstone1000_trusted_boot.c | 39 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
41 *nv_ctr = CORSTONE1000_FW_NVCTR_VAL; in plat_get_nv_ctr()
50 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/ |
| A D | n1sdp_trusted_boot.c | 17 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
19 *nv_ctr = N1SDP_FW_NVCTR_VAL; in plat_get_nv_ctr()
31 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/qemu/common/ |
| A D | qemu_trusted_boot.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/rpi/common/ |
| A D | rpi3_trusted_boot.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/socionext/synquacer/ |
| A D | sq_tbbr.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
27 *nv_ctr = 0; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/socionext/uniphier/ |
| A D | uniphier_tbbr.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
27 *nv_ctr = 0; in plat_get_nv_ctr()
32 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_tbbr.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/ |
| A D | hikey960_tbbr.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/imx/imx7/common/ |
| A D | imx7_trusted_boot.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mm/ |
| A D | imx8mm_trusted_boot.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mp/ |
| A D | imx8mp_trusted_boot.c | 21 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
23 *nv_ctr = 0; in plat_get_nv_ctr()
28 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/arm/board/fvp/ |
| A D | fvp_trusted_boot.c | 46 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
64 mmio_write_32(nv_ctr_addr, nv_ctr); in plat_set_nv_ctr()
70 return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1; in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/plat/arm/board/fvp_r/ |
| A D | fvp_r_trusted_boot.c | 48 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
66 mmio_write_32(nv_ctr_addr, nv_ctr); in plat_set_nv_ctr()
72 return (mmio_read_32(nv_ctr_addr) == nv_ctr) ? 0 : 1; in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/plat/common/tbbr/ |
| A D | plat_tbbr.c | 30 unsigned int nv_ctr) in plat_set_nv_ctr2() argument
45 return plat_set_nv_ctr(cookie, nv_ctr); in plat_set_nv_ctr2()
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| /arm-trusted-firmware-2.8.0/plat/brcm/board/common/ |
| A D | board_arm_trusted_boot.c | 579 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
584 assert(nv_ctr != NULL); in plat_get_nv_ctr()
586 *nv_ctr = 0; in plat_get_nv_ctr()
591 *nv_ctr = sotp_get_trusted_nvctr(); in plat_get_nv_ctr()
593 *nv_ctr = sotp_get_nontrusted_nvctr(); in plat_get_nv_ctr()
605 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
611 INFO("set CTR %i\n", nv_ctr); in plat_set_nv_ctr()
614 return sotp_set_trusted_nvctr(nv_ctr); in plat_set_nv_ctr()
616 return sotp_set_nontrusted_nvctr(nv_ctr); in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/plat/st/common/ |
| A D | stm32mp_trusted_boot.c | 172 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
174 *nv_ctr = mmio_read_32(TAMP_BASE + TAMP_COUNTR); in plat_get_nv_ctr()
179 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
181 while (mmio_read_32(TAMP_BASE + TAMP_COUNTR) != nv_ctr) { in plat_set_nv_ctr()
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| /arm-trusted-firmware-2.8.0/plat/arm/board/common/ |
| A D | board_arm_trusted_boot.c | 228 int plat_get_nv_ctr(void *cookie, unsigned int *nv_ctr) in plat_get_nv_ctr() argument
234 assert(nv_ctr != NULL); in plat_get_nv_ctr()
247 *nv_ctr = (unsigned int)(*nv_ctr_addr); in plat_get_nv_ctr()
260 int plat_set_nv_ctr(void *cookie, unsigned int nv_ctr) in plat_set_nv_ctr() argument
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| /arm-trusted-firmware-2.8.0/plat/arm/board/fvp/include/ |
| A D | fvp_critical_data.h | 20 unsigned int nv_ctr[MAX_NV_CTR_IDS]; member
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| /arm-trusted-firmware-2.8.0/drivers/auth/tbbr/ |
| A D | tbbr_cot_bl1_r64.c | 57 .param.nv_ctr = {
99 .param.nv_ctr = {
131 .param.nv_ctr = {
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| A D | tbbr_cot_bl2.c | 104 .param.nv_ctr = {
146 .param.nv_ctr = {
178 .param.nv_ctr = {
227 .param.nv_ctr = {
259 .param.nv_ctr = {
330 .param.nv_ctr = {
362 .param.nv_ctr = {
475 .param.nv_ctr = {
507 .param.nv_ctr = {
577 .param.nv_ctr = {
|