/arm-trusted-firmware-2.8.0/drivers/st/ddr/ |
A D | stm32mp_ddr_test.c | 71 uint64_t offset; in stm32mp_ddr_test_addr_bus() local 75 for (offset = sizeof(uint32_t); (offset & addressmask) != 0U; in stm32mp_ddr_test_addr_bus() 76 offset <<= 1U) { in stm32mp_ddr_test_addr_bus() 85 for (offset = sizeof(uint32_t); (offset & addressmask) != 0U; in stm32mp_ddr_test_addr_bus() 86 offset <<= 1U) { in stm32mp_ddr_test_addr_bus() 105 for (offset = sizeof(uint32_t); (offset & addressmask) != 0U; in stm32mp_ddr_test_addr_bus() 106 offset <<= 1) { in stm32mp_ddr_test_addr_bus() 109 (offset != testoffset)) { in stm32mp_ddr_test_addr_bus() 142 offset <<= 1U; in stm32mp_ddr_check_size() 145 INFO("Memory size = 0x%x (%u MB)\n", offset, offset / (1024U * 1024U)); in stm32mp_ddr_check_size() [all …]
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/arm-trusted-firmware-2.8.0/lib/libfdt/ |
A D | fdt_ro.c | 122 offset = fdt_next_node(fdt, offset, NULL); in fdt_find_max_phandle() 234 offset = fdt_next_node(fdt, offset, &depth)) in fdt_subnode_offset_namelen() 340 int offset; in fdt_first_property_offset() local 554 (offset >= 0) && (offset <= nodeoffset); in fdt_get_path() 555 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_get_path() 586 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) in fdt_get_path() 606 (offset >= 0) && (offset <= nodeoffset); in fdt_supernode_atdepth_offset() 607 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_supernode_atdepth_offset() 671 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_prop_value() 698 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_phandle() [all …]
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A D | fdt.c | 148 if (offset < 0) in fdt_offset_ptr() 200 offset += 4; in fdt_next_tag() 222 && ((offset < 0) || (offset % FDT_TAGSIZE))) in fdt_check_node_offset_() 225 if (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE) in fdt_check_node_offset_() 228 return offset; in fdt_check_node_offset_() 234 && ((offset < 0) || (offset % FDT_TAGSIZE))) in fdt_check_prop_offset_() 237 if (fdt_next_tag(fdt, offset, &offset) != FDT_PROP) in fdt_check_prop_offset_() 240 return offset; in fdt_check_prop_offset_() 280 return offset; in fdt_next_node() 287 offset = fdt_next_node(fdt, offset, &depth); in fdt_first_subnode() [all …]
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A D | fdt_sw.c | 102 if ((offset + len < offset) || (offset + len > spaceleft)) in fdt_grab_space_() 191 int offset; in fdt_add_reservemap_entry() local 195 offset = fdt_off_dt_struct(fdt); in fdt_add_reservemap_entry() 255 unsigned int struct_top, offset; in fdt_add_string_() local 257 offset = strtabsize + len; in fdt_add_string_() 262 memcpy(strtab - offset, s, len); in fdt_add_string_() 264 return -offset; in fdt_add_string_() 343 int offset, nextoffset; in fdt_finish() local 360 offset = 0; in fdt_finish() 364 fdt_offset_ptr_w_(fdt, offset); in fdt_finish() [all …]
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A D | libfdt_internal.h | 21 int fdt_check_node_offset_(const void *fdt, int offset); 22 int fdt_check_prop_offset_(const void *fdt, int offset); 26 static inline const void *fdt_offset_ptr_(const void *fdt, int offset) in fdt_offset_ptr_() argument 28 return (const char *)fdt + fdt_off_dt_struct(fdt) + offset; in fdt_offset_ptr_() 31 static inline void *fdt_offset_ptr_w_(void *fdt, int offset) in fdt_offset_ptr_w_() argument 33 return (void *)(uintptr_t)fdt_offset_ptr_(fdt, offset); in fdt_offset_ptr_w_()
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A D | fdt_wip.c | 73 int fdt_node_end_offset_(void *fdt, int offset) in fdt_node_end_offset_() argument 77 while ((offset >= 0) && (depth >= 0)) in fdt_node_end_offset_() 78 offset = fdt_next_node(fdt, offset, &depth); in fdt_node_end_offset_() 80 return offset; in fdt_node_end_offset_()
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/arm-trusted-firmware-2.8.0/drivers/marvell/ |
A D | ddr_phy_access.c | 26 int snps_fw_write(uintptr_t offset, uint16_t data) in snps_fw_write() argument 30 if (offset < DDR_PHY_END_ADDRESS) { in snps_fw_write() 31 mmio_write_16(DDR_PHY_BASE_ADDR + (2 * offset), data); in snps_fw_write() 34 debug_printf("%s: illegal offset value: 0x%x\n", __func__, offset); in snps_fw_write() 38 int snps_fw_read(uintptr_t offset, uint16_t *read) in snps_fw_read() argument 42 if (offset < DDR_PHY_END_ADDRESS) { in snps_fw_read() 43 *read = mmio_read_16(DDR_PHY_BASE_ADDR + (2 * offset)); in snps_fw_read() 50 int mvebu_ddr_phy_write(uintptr_t offset, uint16_t data) in mvebu_ddr_phy_write() argument 52 return snps_fw_write(offset, data); in mvebu_ddr_phy_write() 55 int mvebu_ddr_phy_read(uintptr_t offset, uint16_t *read) in mvebu_ddr_phy_read() argument [all …]
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/arm-trusted-firmware-2.8.0/plat/imx/imx8m/ |
A D | imx8m_dyn_cfg_helpers.c | 26 int offset; in imx8m_event_log_fdt_init_overlay() local 37 if (offset < 0) { in imx8m_event_log_fdt_init_overlay() 40 return offset; in imx8m_event_log_fdt_init_overlay() 43 offset = fdt_add_subnode(dtb, offset, "fragment@0"); in imx8m_event_log_fdt_init_overlay() 44 if (offset < 0) { in imx8m_event_log_fdt_init_overlay() 47 return offset; in imx8m_event_log_fdt_init_overlay() 57 offset = fdt_add_subnode(dtb, offset, "__overlay__"); in imx8m_event_log_fdt_init_overlay() 58 if (offset < 0) { in imx8m_event_log_fdt_init_overlay() 64 offset = fdt_add_subnode(dtb, offset, "tpm_event_log"); in imx8m_event_log_fdt_init_overlay() 65 if (offset < 0) { in imx8m_event_log_fdt_init_overlay() [all …]
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/arm-trusted-firmware-2.8.0/drivers/arm/pl061/ |
A D | pl061_gpio.c | 51 unsigned int data, offset; in pl061_get_direction() local 56 offset = gpio % GPIOS_PER_PL061; in pl061_get_direction() 58 if (data & BIT(offset)) in pl061_get_direction() 66 unsigned int data, offset; in pl061_set_direction() local 71 offset = gpio % GPIOS_PER_PL061; in pl061_set_direction() 92 unsigned int offset; in pl061_get_value() local 97 offset = gpio % GPIOS_PER_PL061; in pl061_get_value() 98 if (mmio_read_8(base_addr + BIT(offset + 2))) in pl061_get_value() 111 int offset; in pl061_set_value() local 116 offset = gpio % GPIOS_PER_PL061; in pl061_set_value() [all …]
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/arm-trusted-firmware-2.8.0/plat/renesas/common/ |
A D | plat_storage.c | 28 .offset = FLASH0_BASE, 33 .offset = BL2_IMAGE_ID, 37 .offset = BL31_IMAGE_ID, 41 .offset = BL32_IMAGE_ID, 45 .offset = BL33_IMAGE_ID, 49 .offset = BL332_IMAGE_ID, 53 .offset = BL333_IMAGE_ID, 57 .offset = BL334_IMAGE_ID, 61 .offset = BL335_IMAGE_ID, 65 .offset = BL336_IMAGE_ID, [all …]
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/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
A D | hisi_ipc.c | 101 unsigned int offset; in hisi_ipc_cpu_on_off() local 110 val |= (0x01 << offset); in hisi_ipc_cpu_on_off() 133 unsigned int offset; in hisi_ipc_cluster_on_off() local 136 offset = cluster * 4; in hisi_ipc_cluster_on_off() 138 offset = cluster * 4 + 1; in hisi_ipc_cluster_on_off() 142 val |= (0x01 << offset); in hisi_ipc_cluster_on_off() 164 unsigned int offset; in hisi_ipc_cpu_suspend() local 170 val |= (0x01 << offset); in hisi_ipc_cpu_suspend() 180 unsigned int offset; in hisi_ipc_cluster_suspend() local 182 offset = cluster * 4 + 1; in hisi_ipc_cluster_suspend() [all …]
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/arm-trusted-firmware-2.8.0/drivers/st/reset/ |
A D | stm32mp1_reset.c | 31 uint32_t offset = id2reg_offset(id); in stm32mp_reset_assert() local 35 mmio_write_32(rcc_base + offset, bitmsk); in stm32mp_reset_assert() 40 while ((mmio_read_32(rcc_base + offset) & bitmsk) == 0U) { in stm32mp_reset_assert() 52 uint32_t offset = id2reg_offset(id) + RCC_RSTCLRR_OFFSET; in stm32mp_reset_deassert() local 56 mmio_write_32(rcc_base + offset, bitmsk); in stm32mp_reset_deassert() 61 while ((mmio_read_32(rcc_base + offset) & bitmsk) != 0U) { in stm32mp_reset_deassert()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/gpio/ |
A D | mtgpio.c | 182 const int32_t offset = 0x0c0; in gpio_get_pupd_iocfg() local 186 return IOCFG_1_BASE + offset; in gpio_get_pupd_iocfg() 188 return IOCFG_2_BASE + offset; in gpio_get_pupd_iocfg() 190 return IOCFG_5_BASE + offset; in gpio_get_pupd_iocfg() 192 return IOCFG_7_BASE + offset; in gpio_get_pupd_iocfg() 232 1U << PULL_offset[pin].offset); in mt_set_gpio_pull_enable_chip() 246 1U << PULL_offset[pin].offset); in mt_set_gpio_pull_enable_chip() 305 1U << PULL_offset[pin].offset); in mt_set_gpio_pull_select_chip() 312 1U << PULL_offset[pin].offset); in mt_set_gpio_pull_select_chip() 315 if (PULL_offset[pin].offset == -1) in mt_set_gpio_pull_select_chip() [all …]
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/arm-trusted-firmware-2.8.0/include/drivers/io/ |
A D | io_mtd.h | 35 int (*read)(unsigned int offset, uintptr_t buffer, size_t length, 46 int (*write)(unsigned int offset, uintptr_t buffer, size_t length); 56 int (*seek)(uintptr_t base, unsigned int offset, size_t *extra_offset); 62 size_t offset; member
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/arm-trusted-firmware-2.8.0/plat/brcm/board/common/ |
A D | bcm_elog.c | 51 uint32_t offset, len; in elog_putchar() local 53 offset = mmio_read_32(elog->base + BCM_ELOG_OFF_OFFSET); in elog_putchar() 55 mmio_write_8(elog->base + offset, c); in elog_putchar() 56 offset++; in elog_putchar() 59 if (offset >= elog->max_size) in elog_putchar() 60 offset = BCM_ELOG_HEADER_LEN; in elog_putchar() 66 mmio_write_32(elog->base + BCM_ELOG_OFF_OFFSET, offset); in elog_putchar() 148 uint32_t offset, len; in bcm_elog_copy_log() local 161 offset = mmio_read_32(elog->base + BCM_ELOG_OFF_OFFSET); in bcm_elog_copy_log() 162 if (offset >= max_size) { in bcm_elog_copy_log() [all …]
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/arm-trusted-firmware-2.8.0/drivers/mtd/nand/ |
A D | core.c | 35 int nand_read(unsigned int offset, uintptr_t buffer, size_t length, in nand_read() argument 38 unsigned int block = offset / nand_dev.block_size; in nand_read() 39 unsigned int end_block = (offset + length - 1U) / nand_dev.block_size; in nand_read() 41 (offset % nand_dev.block_size) / nand_dev.page_size; in nand_read() 43 unsigned int start_offset = offset % nand_dev.page_size; in nand_read() 56 block, end_block, page_start, nb_pages, length, offset); in nand_read() 132 int nand_seek_bb(uintptr_t base, unsigned int offset, size_t *extra_offset) in nand_seek_bb() argument 142 if (offset != 0U) { in nand_seek_bb() 143 offset_block = (base + offset - 1U) / nand_dev.block_size; in nand_seek_bb()
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/arm-trusted-firmware-2.8.0/plat/amlogic/common/ |
A D | aml_efuse.c | 14 uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size) in aml_efuse_read() argument 16 if ((uint64_t)(offset + size) > (uint64_t)EFUSE_SIZE) in aml_efuse_read() 19 return aml_scpi_efuse_read(dst, offset + EFUSE_BASE, size); in aml_efuse_read()
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/arm-trusted-firmware-2.8.0/include/drivers/brcm/ |
A D | spi_flash.h | 13 int spi_flash_erase(struct spi_flash *flash, uint32_t offset, uint32_t len); 14 int spi_flash_write(struct spi_flash *flash, uint32_t offset, 16 int spi_flash_read(struct spi_flash *flash, uint32_t offset,
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/arm-trusted-firmware-2.8.0/plat/intel/soc/common/drivers/qspi/ |
A D | cadence_qspi.c | 673 offset += write_size; in cad_qspi_write_bank() 689 if ((offset >= qspi_device_size) || in cad_qspi_read() 690 (offset + size - 1 >= qspi_device_size) || in cad_qspi_read() 710 CAD_QSPI_BANK_ADDR(offset) + 1; in cad_qspi_read() 745 status = cad_qspi_erase_subsector(offset); in cad_qspi_erase() 749 offset += erase_size; in cad_qspi_erase() 764 if ((offset >= qspi_device_size) || in cad_qspi_write() 765 (offset + size - 1 >= qspi_device_size) || in cad_qspi_write() 777 CAD_QSPI_BANK_ADDR(offset) + 1; in cad_qspi_write() 778 bank_addr = offset & CAD_QSPI_BANK_ADDR_MSK; in cad_qspi_write() [all …]
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/arm-trusted-firmware-2.8.0/drivers/nxp/sec_mon/ |
A D | snvs.c | 137 void snvs_write_lp_gpr_bit(uint32_t offset, uint32_t bit_pos, bool flag_val) in snvs_write_lp_gpr_bit() argument 140 snvs_write32(g_nxp_snvs_addr + offset, in snvs_write_lp_gpr_bit() 141 (snvs_read32(g_nxp_snvs_addr + offset)) in snvs_write_lp_gpr_bit() 144 snvs_write32(g_nxp_snvs_addr + offset, in snvs_write_lp_gpr_bit() 145 (snvs_read32(g_nxp_snvs_addr + offset)) in snvs_write_lp_gpr_bit() 150 uint32_t snvs_read_lp_gpr_bit(uint32_t offset, uint32_t bit_pos) in snvs_read_lp_gpr_bit() argument 152 return (snvs_read32(g_nxp_snvs_addr + offset) & (1 << bit_pos)); in snvs_read_lp_gpr_bit()
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/arm-trusted-firmware-2.8.0/include/lib/el3_runtime/aarch32/ |
A D | context.h | 50 #define read_ctx_reg(ctx, offset) ((ctx)->ctx_regs[offset >> WORD_SHIFT]) argument 51 #define write_ctx_reg(ctx, offset, val) (((ctx)->ctx_regs[offset >> WORD_SHIFT]) \ argument
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/arm-trusted-firmware-2.8.0/plat/nxp/common/nv_storage/ |
A D | plat_nv_storage.c | 45 uint8_t offset = 0U; in read_nv_app_data() local 49 nv_app_data_array[offset] = snvs_read_app_data_bit(offset); in read_nv_app_data() 50 offset++; in read_nv_app_data() 52 } while (offset < APP_DATA_MAX_OFFSET); in read_nv_app_data()
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/arm-trusted-firmware-2.8.0/drivers/brcm/emmc/ |
A D | emmc_pboot_hal_memory_drv.c | 357 if (offset > 0) { in sdio_read() 361 if (remSize < (blockSize - offset)) { in sdio_read() 366 remSize -= (blockSize - offset); in sdio_read() 367 rdCount += (blockSize - offset); in sdio_read() 368 manual_copy_size = blockSize - offset; in sdio_read() 474 offset = in sdio_write() 489 if (offset > 0) { in sdio_write() 514 offset)) { in sdio_write() 521 offset); in sdio_write() 524 offset); in sdio_write() [all …]
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/arm-trusted-firmware-2.8.0/drivers/renesas/common/io/ |
A D | io_rcar.c | 36 const uint32_t offset; member 48 uintptr_t offset; member 177 *offset += 0x800000; in file_to_offset() 194 *offset = 0U; in file_to_offset() 308 uintptr_t offset; in load_bl33x() local 385 ssize_t offset; in rcar_dev_init() local 495 if (current_file.offset != 0U) { in rcar_file_open() 500 rc = file_to_offset(spec->offset, &offset, &cert, &noload, &partition); in rcar_file_open() 507 current_file.offset = 1; in rcar_file_open() 529 current_file.offset = offset; in rcar_file_open() [all …]
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/arm-trusted-firmware-2.8.0/lib/debugfs/ |
A D | devfip.c | 23 long offset[NR_FILES]; member 140 if (fip->offset[i] == -1) { in fipgen() 204 if ((c->qid >= NR_FILES) || (fip->offset[c->qid] < 0)) { in fipread() 213 if (c->offset >= size) { in fipread() 221 if (n > (size - c->offset)) { in fipread() 222 n = size - c->offset; in fipread() 225 off = fip->offset[c->qid] + c->offset; in fipread() 232 c->offset += n; in fipread() 260 fip->offset[n] = -1; in fipmount() 299 fip->offset[n] = entry.offset_address; in fipmount()
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